Allow DMA request zero for peripheral transfers

[JaxCalder]

Change

validate_transfer_config() now accepts request selector 0 for peripheral DMA transfers. On STM32F4/F7, the existing port maps that value to hardware DMA channel 0 (CHSEL=0). The old core validation rejected it before the port could see it. For memory-to-memory transfers, DMDMA_REQUEST_NONE remains required; the transfer direction determines the meaning of zero. This changes no API or ABI.

The STM32 port also continues to map legacy request 8 to channel 0, so modules built against dmdma 0.5 continue working. Documentation now states both encodings. The unused dmdma_stm32_channel_request() helper and the proposed port range check are absent from the final diff.

Validation

• Built dmdma, dmdma_port, dmdma_test_lease and dmdma_test_port for STM32F7.
• Built local dmdma/dmdma_port 0.5.1, installed both .dmf and .dmfc into a clean dmod-boot package, rebuilt and flashed STM32F746G-DISCO.
• Tested a temporary local dmsai build with request=0 for SAI1 and ran dmsai_port_board_test over UART. SAI1 and SAI2 passed at 48 kHz and 44.1 kHz, DMA counters advanced, and transfer errors stayed zero. There was no core -EINVAL rejection. The current dmsai PR #4 still uses legacy request 8 for compatibility with published dmdma 0.5.