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Move WB0 board to NUCLEO-WB09KE, rework RCC, alias WB0 GPIO - #60
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…O-WB09KE, rework RCC, alias WB0 GPIO - Rename stm32wb05kz_nucleo to stm32wb09ke_nucleo and stm32wb05kz.h to stm32wb09ke.h to match the board's part - Bound RCC polls with whal_Timeout; add SetSlowClock, SetLpuartClock, DisableHsi, DisablePll and a PLL lock detector setting; SetSysClock takes source and divider - WB0 GPIO aliases the STM32WB driver through a configurable port stride - Add the fixed 16 MHz USART clock constant to the WB0 UART alias - Flash lock covers all 256 WB09 pages - Linker skips the boot ROM's reserved SRAM words; add the TRNG vector - Select LSI as the slow clock when the IWDG is enabled - Add flash.tcl for make flash and a WB0 clock test
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🟡 Changes recommended
RCC waits use an inactive timeout timebase during startup and teardown, and the new clock suite is omitted from default test builds.
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What changed in this PR
Updates wolfHAL’s STM32WB0 support to target NUCLEO-WB09KE, corrects device-specific configuration, and reuses the shared STM32WB GPIO driver.
Changes:
- Renames the board and platform, updating memory layout, interrupts, documentation, and CI.
- Reworks RCC helpers, GPIO port spacing, USART clock configuration, and flash protection.
- Adds direct-register OpenOCD flashing and clock tests.
| File | Description |
|---|---|
wolfHAL/uart/stm32wb0_uart.h |
Defines the fixed USART kernel clock. |
wolfHAL/platform/st/stm32wb09ke.h |
Renames the platform and updates flash capacity. |
wolfHAL/gpio/stm32wb0_gpio.h |
Aliases the shared GPIO driver with WB0 port spacing. |
wolfHAL/gpio/stm32wb_gpio.h |
Makes port spacing configurable and supports WB0 mapping. |
wolfHAL/flash/stm32wb0_flash.h |
Corrects WB09 flash documentation. |
wolfHAL/clock/stm32wb0_rcc.h |
Adds timeout-aware polling and clock-control helpers. |
tests/gpio/test_stm32wb0_gpio.c |
Reuses shared GPIO tests. |
tests/gpio/test_stm32wb_gpio.c |
Uses configurable port spacing. |
tests/flash/test_stm32wb0_flash.c |
Updates the reference-manual citation in a comment. |
tests/clock/test_stm32wb0_clock.c |
Adds clock-state and invalid-configuration tests. |
src/gpio/stm32wb0_gpio.c |
Replaces the dedicated implementation with an alias. |
src/gpio/stm32wb_gpio.c |
Uses configurable spacing for register access. |
src/flash/stm32wb0_flash.c |
Protects all 256 pages using two segments. |
boards/stm32wb09ke_nucleo/wolfHAL_board.h |
Updates board device initializers and flash geometry. |
boards/stm32wb09ke_nucleo/wolfHAL_board.c |
Updates clock setup, teardown, and peripheral references. |
boards/stm32wb09ke_nucleo/linker.ld |
Configures WB09 memory and reserves boot-ROM SRAM. |
boards/stm32wb09ke_nucleo/ivt.c |
Adds the TRNG interrupt vector. |
boards/stm32wb09ke_nucleo/flash.tcl |
Adds chunked flash programming and verification. |
boards/stm32wb09ke_nucleo/board.mk |
Routes flashing through the new OpenOCD script. |
boards/README.md |
Lists the renamed board. |
.github/workflows/boards.yml |
Builds the renamed board in CI. |
Review effort: Balanced
| WHAL_EINVAL); | ||
| } | ||
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| void whal_Test_Clock_Platform(void) |
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Summary
Moves the STM32WB0 board to the part it actually runs on (NUCLEO-WB09KE), reworks the WB0 RCC driver against RM0505, and fixes several WB09 issues in the existing WB0 support.
Changes
Board
stm32wb05kz_nucleotostm32wb09ke_nucleoandstm32wb05kz.htostm32wb09ke.h: 512 KB flash, 64 KB SRAM, TRNG vector at position 28make flashuses a newflash.tclthat programs the flash controller registers directly through OpenOCD, since ST-Link drag-and-drop fails to identify the WB09 and the bluenrg-x flash driver wedges the chipClock
whal_TimeoutSetSlowClock,SetLpuartClock,DisableHsi,DisablePlland a PLL lock detector settingSetSysClocktakes source and divider and orders the writes so 64 MHz is never requested from HSEGPIO and UART
WHAL_STM32WB_GPIO_PORT_SIZE(default 0x400, unchanged for existing platforms)WHAL_STM32WB0_UART_CLK_HZfor the fixed 16 MHz USART clockFlash
Testing
stm32wb09ke_nucleowith and withoutWATCHDOG=iwdgmake flash: clock, gpio, flash, timer, rng, uart and i2c suites pass (27/27)flash.tclverified with a 40 KB image spanning two staging chunks, including a partial last word🤖 Generated with Claude Code