fix: evaluate plated spans on intermediate layers

[seveibar]

Summary

• expand via and plated-hole endpoint pairs to every physical board layer in their inclusive span
• use the board's num_layers when evaluating trace overlap/clearance, pad clearance, via-in-pad, and via-spacing checks
• handle reversed endpoint order and retain blind/buried partial spans
• apply via-spacing rules only when the two physical plated spans overlap

Why

Circuit JSON stores a plated via span by its endpoint layers. On a four-layer board, layers: ["top", "bottom"] is physically present on top, inner1, inner2, and bottom. The shared layer helper previously returned only the two literal array entries, so routing checks could miss an unrelated trace or pad on an intermediate layer.

Conversely, two nearby blind or buried vias with disjoint physical spans do not need layer-to-layer clearance from each other. The spacing checks now use the same board-aware span interpretation to avoid that false positive.

This is the final Circuit JSON safety-net companion to tscircuit/high-density-repair03#79 and the through-via work for tscircuit/tscircuit-autorouter#2156. The router-side DRC prevents bad output while routing; this PR ensures ordinary post-render checks interpret the same physical span correctly.

Validation

• bun test — 188 pass, 0 fail
• focused coverage for four-layer forward/reversed/partial spans, intermediate-layer trace overlap and positive clearance, intermediate-layer pad clearance, and disjoint blind/buried via spacing
• bunx tsc --noEmit
• bun run build
• Biome check and git diff --check