Pinned Loading

1. tt-8bit-alu tt-8bit-alu Public

   8-bit ALU (ADD, SUB, AND, OR, XOR, NOT, PASS) synthesized on IHP 130nm silicon via TinyTapeout. Verilog RTL + cocotb testbench + full GDS layout.

   Python

2. Vision-In-Memory-System-On-RISCV Vision-In-Memory-System-On-RISCV Public

   3-stage RISC-V pipeline on Artix-7 FPGA with ReRAM In-Memory Computing accelerator for Sobel edge detection

   Verilog 4 3

3. scalable-alu scalable-alu Public

   Parameterized 8-bit, 16-bit and 32-bit ALU designs in Verilog supporting parallel arithmetic and bitwise logical operations, with RTL modules optimized for bit-width scaling and full behavioral sim…

   Verilog

4. sac-augmented-pid-uav sac-augmented-pid-uav Public

   MATLAB/Simulink implementation of a 6-DOF quadcopter control system where a Soft Actor-Critic (SAC) reinforcement learning agent dynamically tunes cascaded PID gains in real-time to maintain hover …

   MATLAB 3