Skip to content

Commit 67a672b

Browse files
sgaud-quicsgaud-quic
committed
Merge remote-tracking branch tech/all/workaround into qcom-next
# Conflicts: # include/linux/firmware/qcom/qcom_scm.h
2 parents 3342111 + 841239d commit 67a672b

5 files changed

Lines changed: 111 additions & 143 deletions

File tree

‎arch/arm64/boot/dts/qcom/sm8750-mtp.dts‎

Lines changed: 4 additions & 143 deletions
Original file line numberDiff line numberDiff line change
@@ -201,74 +201,6 @@
201201
regulator-always-on;
202202
regulator-boot-on;
203203
};
204-
205-
/*
206-
* MTPs rev 2.0 (power grid v8) come with two different WiFi chips:
207-
* WCN7850 and WCN786x.
208-
* Device nodes here for the PMU, WiFi and Bluetooth describe the MTP
209-
* variant with WCN7850.
210-
*/
211-
wcn7850-pmu {
212-
compatible = "qcom,wcn7850-pmu";
213-
214-
pinctrl-names = "default";
215-
pinctrl-0 = <&wlan_en>, <&bt_default>;
216-
217-
wlan-enable-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;
218-
bt-enable-gpios = <&pm8550ve_f_gpios 3 GPIO_ACTIVE_HIGH>;
219-
220-
vdd-supply = <&vreg_s5f_0p85>;
221-
vddio-supply = <&vreg_l3f_1p8>;
222-
vddio1p2-supply = <&vreg_l2f_1p2>;
223-
vddaon-supply = <&vreg_s4d_0p85>;
224-
vdddig-supply = <&vreg_s1d_0p97>;
225-
vddrfa1p2-supply = <&vreg_s7i_1p2>;
226-
vddrfa1p8-supply = <&vreg_s3g_1p8>;
227-
228-
clocks = <&rpmhcc RPMH_RF_CLK1>;
229-
230-
regulators {
231-
vreg_pmu_rfa_cmn: ldo0 {
232-
regulator-name = "vreg_pmu_rfa_cmn";
233-
};
234-
235-
vreg_pmu_aon_0p59: ldo1 {
236-
regulator-name = "vreg_pmu_aon_0p59";
237-
};
238-
239-
vreg_pmu_wlcx_0p8: ldo2 {
240-
regulator-name = "vreg_pmu_wlcx_0p8";
241-
};
242-
243-
vreg_pmu_wlmx_0p85: ldo3 {
244-
regulator-name = "vreg_pmu_wlmx_0p85";
245-
};
246-
247-
vreg_pmu_btcmx_0p85: ldo4 {
248-
regulator-name = "vreg_pmu_btcmx_0p85";
249-
};
250-
251-
vreg_pmu_rfa_0p8: ldo5 {
252-
regulator-name = "vreg_pmu_rfa_0p8";
253-
};
254-
255-
vreg_pmu_rfa_1p2: ldo6 {
256-
regulator-name = "vreg_pmu_rfa_1p2";
257-
};
258-
259-
vreg_pmu_rfa_1p8: ldo7 {
260-
regulator-name = "vreg_pmu_rfa_1p8";
261-
};
262-
263-
vreg_pmu_pcie_0p9: ldo8 {
264-
regulator-name = "vreg_pmu_pcie_0p9";
265-
};
266-
267-
vreg_pmu_pcie_1p8: ldo9 {
268-
regulator-name = "vreg_pmu_pcie_1p8";
269-
};
270-
};
271-
};
272204
};
273205

274206
&apps_rsc {
@@ -494,7 +426,7 @@
494426

495427
vreg_s4d_0p85: smps4 {
496428
regulator-name = "vreg_s4d_0p85";
497-
regulator-min-microvolt = <852000>;
429+
regulator-min-microvolt = <500000>;
498430
regulator-max-microvolt = <1036000>;
499431
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
500432
};
@@ -540,9 +472,9 @@
540472

541473
qcom,pmic-id = "f";
542474

543-
vreg_s5f_0p85: smps5 {
544-
regulator-name = "vreg_s5f_0p85";
545-
regulator-min-microvolt = <852000>;
475+
vreg_s5f_0p5: smps5 {
476+
regulator-name = "vreg_s5f_0p5";
477+
regulator-min-microvolt = <500000>;
546478
regulator-max-microvolt = <1000000>;
547479
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
548480
};
@@ -959,40 +891,6 @@
959891
status = "okay";
960892
};
961893

962-
&pcie0 {
963-
wake-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
964-
perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
965-
966-
pinctrl-0 = <&pcie0_default_state>;
967-
pinctrl-names = "default";
968-
969-
status = "okay";
970-
};
971-
972-
&pcie0_phy {
973-
vdda-phy-supply = <&vreg_l1f_0p88>;
974-
vdda-pll-supply = <&vreg_l3g_1p2>;
975-
976-
status = "okay";
977-
};
978-
979-
&pcieport0 {
980-
wifi@0 {
981-
compatible = "pci17cb,1107";
982-
reg = <0x10000 0x0 0x0 0x0 0x0>;
983-
984-
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
985-
vddaon-supply = <&vreg_pmu_aon_0p59>;
986-
vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
987-
vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
988-
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
989-
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
990-
vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
991-
vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
992-
vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
993-
};
994-
};
995-
996894
&pmih0108_eusb2_repeater {
997895
status = "okay";
998896

@@ -1004,10 +902,6 @@
1004902
status = "okay";
1005903
};
1006904

1007-
&qupv3_2 {
1008-
status = "okay";
1009-
};
1010-
1011905
&remoteproc_adsp {
1012906
firmware-name = "qcom/sm8750/adsp.mbn",
1013907
"qcom/sm8750/adsp_dtb.mbn";
@@ -1141,46 +1035,13 @@
11411035
};
11421036

11431037
&tlmm {
1144-
bt_default: bt-default-state {
1145-
sw-ctrl-pins {
1146-
pins = "gpio18";
1147-
function = "gpio";
1148-
bias-pull-down;
1149-
};
1150-
};
1151-
11521038
wcd_default: wcd-reset-n-active-state {
11531039
pins = "gpio101";
11541040
function = "gpio";
11551041
drive-strength = <16>;
11561042
bias-disable;
11571043
output-low;
11581044
};
1159-
1160-
wlan_en: wlan-en-state {
1161-
pins = "gpio16";
1162-
function = "gpio";
1163-
drive-strength = <8>;
1164-
bias-pull-down;
1165-
};
1166-
};
1167-
1168-
&uart14 {
1169-
status = "okay";
1170-
1171-
bluetooth {
1172-
compatible = "qcom,wcn7850-bt";
1173-
1174-
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
1175-
vddaon-supply = <&vreg_pmu_aon_0p59>;
1176-
vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
1177-
vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
1178-
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
1179-
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
1180-
vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
1181-
1182-
max-speed = <3200000>;
1183-
};
11841045
};
11851046

11861047
&ufs_mem_phy {

‎drivers/firmware/qcom/qcom_scm.c‎

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2549,6 +2549,51 @@ bool qcom_scm_is_available(void)
25492549
}
25502550
EXPORT_SYMBOL_GPL(qcom_scm_is_available);
25512551

2552+
int qcom_scm_camera_update_camnoc_qos(uint32_t use_case_id,
2553+
uint32_t cam_qos_cnt, struct qcom_scm_camera_qos *cam_qos)
2554+
{
2555+
int ret;
2556+
dma_addr_t payload_phys;
2557+
u32 *payload_buf = NULL;
2558+
u32 payload_size = 0;
2559+
2560+
if ((cam_qos_cnt > QCOM_SCM_CAMERA_MAX_QOS_CNT) || (cam_qos_cnt && !cam_qos)) {
2561+
pr_err("Invalid input SmartQoS count: %d\n", cam_qos_cnt);
2562+
return -EINVAL;
2563+
}
2564+
2565+
struct qcom_scm_desc desc = {
2566+
.svc = QCOM_SCM_SVC_CAMERA,
2567+
.cmd = QCOM_SCM_CAMERA_UPDATE_CAMNOC_QOS,
2568+
.owner = ARM_SMCCC_OWNER_SIP,
2569+
.args[0] = use_case_id,
2570+
.args[2] = payload_size,
2571+
.arginfo = QCOM_SCM_ARGS(3, QCOM_SCM_VAL, QCOM_SCM_RW, QCOM_SCM_VAL),
2572+
};
2573+
2574+
payload_size = cam_qos_cnt * sizeof(struct qcom_scm_camera_qos);
2575+
2576+
/* fill all required qos settings */
2577+
if (use_case_id && payload_size && cam_qos) {
2578+
payload_buf = dma_alloc_coherent(__scm->dev,
2579+
payload_size, &payload_phys, GFP_KERNEL);
2580+
if (!payload_buf)
2581+
return -ENOMEM;
2582+
2583+
memcpy(payload_buf, cam_qos, payload_size);
2584+
desc.args[1] = payload_phys;
2585+
desc.args[2] = payload_size;
2586+
2587+
}
2588+
ret = qcom_scm_call(__scm->dev, &desc, NULL);
2589+
2590+
if (payload_buf)
2591+
dma_free_coherent(__scm->dev, payload_size, payload_buf, payload_phys);
2592+
2593+
return ret;
2594+
}
2595+
EXPORT_SYMBOL_GPL(qcom_scm_camera_update_camnoc_qos);
2596+
25522597
static int qcom_scm_assert_valid_wq_ctx(u32 wq_ctx)
25532598
{
25542599
/* FW currently only supports a single wq_ctx (zero).

‎drivers/firmware/qcom/qcom_scm.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -174,6 +174,9 @@ int qcom_scm_shm_bridge_enable(struct device *scm_dev);
174174
#define QCOM_SCM_INTERRUPTED 1
175175
#define QCOM_SCM_WAITQ_SLEEP 2
176176

177+
#define QCOM_SCM_SVC_CAMERA 0x18
178+
#define QCOM_SCM_CAMERA_UPDATE_CAMNOC_QOS 0xA
179+
177180
static inline int qcom_scm_remap_error(int err)
178181
{
179182
switch (err) {

‎include/dt-bindings/mailbox/qcom-ipcc.h‎

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -36,4 +36,52 @@
3636
#define IPCC_CLIENT_GPDSP0 31
3737
#define IPCC_CLIENT_GPDSP1 32
3838

39+
/* Physical client IDs */
40+
#define IPCC_MPROC_AOP 0
41+
#define IPCC_MPROC_TZ 1
42+
#define IPCC_MPROC_MPSS 2
43+
#define IPCC_MPROC_LPASS 3
44+
#define IPCC_MPROC_SDC 4
45+
#define IPCC_MPROC_CDSP 5
46+
#define IPCC_MPROC_APSS 6
47+
#define IPCC_MPROC_SOCCP 13
48+
#define IPCC_MPROC_DCP 14
49+
#define IPCC_MPROC_SPSS 15
50+
#define IPCC_MPROC_TME 16
51+
52+
#define IPCC_COMPUTE_L0_CDSP 2
53+
#define IPCC_COMPUTE_L0_APSS 3
54+
#define IPCC_COMPUTE_L0_GPU 4
55+
#define IPCC_COMPUTE_L0_CVP 8
56+
#define IPCC_COMPUTE_L0_CAM 9
57+
#define IPCC_COMPUTE_L0_CAM1 10
58+
#define IPCC_COMPUTE_L0_DCP 11
59+
#define IPCC_COMPUTE_L0_VPU 12
60+
#define IPCC_COMPUTE_L0_SOCCP 16
61+
62+
#define IPCC_COMPUTE_L1_CDSP 2
63+
#define IPCC_COMPUTE_L1_APSS 3
64+
#define IPCC_COMPUTE_L1_GPU 4
65+
#define IPCC_COMPUTE_L1_CVP 8
66+
#define IPCC_COMPUTE_L1_CAM 9
67+
#define IPCC_COMPUTE_L1_CAM1 10
68+
#define IPCC_COMPUTE_L1_DCP 11
69+
#define IPCC_COMPUTE_L1_VPU 12
70+
#define IPCC_COMPUTE_L1_SOCCP 16
71+
72+
#define IPCC_PERIPH_CDSP 2
73+
#define IPCC_PERIPH_APSS 3
74+
#define IPCC_PERIPH_PCIE0 4
75+
#define IPCC_PERIPH_PCIE1 5
76+
77+
#define IPCC_FENCE_CDSP 2
78+
#define IPCC_FENCE_APSS 3
79+
#define IPCC_FENCE_GPU 4
80+
#define IPCC_FENCE_CVP 8
81+
#define IPCC_FENCE_CAM 8
82+
#define IPCC_FENCE_VPU 20
83+
#define IPCC_FENCE_SOCCP 24
84+
#define IPCC_FENCE_CAM1 10
85+
#define IPCC_FENCE_DCP 11
86+
3987
#endif

‎include/linux/firmware/qcom/qcom_scm.h‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,10 +10,12 @@
1010
#include <linux/cpumask.h>
1111

1212
#include <dt-bindings/firmware/qcom,scm.h>
13+
#include <asm-generic/errno-base.h>
1314

1415
#define QCOM_SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF))
1516
#define QCOM_SCM_CPU_PWR_DOWN_L2_ON 0x0
1617
#define QCOM_SCM_CPU_PWR_DOWN_L2_OFF 0x1
18+
#define QCOM_SCM_CAMERA_MAX_QOS_CNT 2
1719
#define QCOM_SCM_HDCP_MAX_REQ_CNT 5
1820

1921
struct qcom_scm_hdcp_req {
@@ -77,6 +79,15 @@ struct qcom_scm_pas_context {
7779
bool has_iommu;
7880
};
7981

82+
struct qcom_scm_camera_qos {
83+
u32 offset;
84+
u32 val;
85+
};
86+
87+
int qcom_scm_camera_update_camnoc_qos(uint32_t use_case_id,
88+
uint32_t qos_cnt, struct qcom_scm_camera_qos *scm_buf);
89+
90+
8091
struct qcom_scm_pas_context *devm_qcom_scm_pas_context_init(struct device *dev,
8192
u32 pas_id,
8293
phys_addr_t mem_phys,

0 commit comments

Comments
 (0)