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Summary: On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3. `RemovePermutesAroundElementwiseOps` cancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes. Add `CortexMRemovePermutesAroundElementwiseOps`, which sinks each layout copy below a following squeeze and then runs `RemovePermutesAroundElementwiseOps`. The sinking is done by `CortexMPostponeLayoutCopyBelowSqueezePass`, a restricted `PostponePermuteOpBelowSqueezeOrUnsqueezeLikeView`: it only moves the layout copies this pipeline inserts, leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. The sinking runs inside the pass, outside the pass manager's dtype-preserving retrace, so when only the sinking changed the graph the pass retraces once more to restore the folded int8 dtypes. Authored with an AI coding assistant (Claude). Differential Revision: D128001279
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Summary: On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3. `RemovePermutesAroundElementwiseOps` cancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes. Add `CortexMRemovePermutesAroundElementwiseOps`, which sinks each layout copy below a following squeeze and then runs `RemovePermutesAroundElementwiseOps`. The sinking is done by `CortexMPostponeLayoutCopyBelowSqueezePass`, a restricted `PostponePermuteOpBelowSqueezeOrUnsqueezeLikeView`: it only moves the layout copies this pipeline inserts, leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. The sinking runs inside the pass, outside the pass manager's dtype-preserving retrace, so when only the sinking changed the graph the pass retraces once more to restore the folded int8 dtypes. Authored with an AI coding assistant (Claude). Differential Revision: D128001279
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Summary: On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3. `RemovePermutesAroundElementwiseOps` cancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes. Add `CortexMPostponeLayoutCopyBelowSqueezePass`, a restricted `PostponePermuteOpBelowSqueezeOrUnsqueezeLikeView`, and run it just before `RemovePermutesAroundElementwiseOps` in the explicit-layout pass list. It only moves the layout copies this pipeline inserts (its `targets` is `LAYOUT_PERMUTE_COPY`), leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. As its own pass-list entry, the pass gets the pass manager's dtype-preserving retrace, so the folded int8 dtypes survive the sinking. Authored with an AI coding assistant (Claude). Differential Revision: D128001279
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Summary: On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3. `RemovePermutesAroundElementwiseOps` cancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes. Add `CortexMPostponeLayoutCopyBelowSqueezePass`, a restricted `PostponePermuteOpBelowSqueezeOrUnsqueezeLikeView`, and run it just before `RemovePermutesAroundElementwiseOps` in the explicit-layout pass list. It only moves the layout copies this pipeline inserts (its `targets` is `LAYOUT_PERMUTE_COPY`), leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. As its own pass-list entry, the pass gets the pass manager's dtype-preserving retrace, so the folded int8 dtypes survive the sinking. Authored with an AI coding assistant (Claude). Differential Revision: D128001279
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Summary: On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3. `RemovePermutesAroundElementwiseOps` cancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes. Add `CortexMPostponeLayoutCopyBelowSqueezePass`, a restricted `PostponePermuteOpBelowSqueezeOrUnsqueezeLikeView`, and run it just before `RemovePermutesAroundElementwiseOps` in the explicit-layout pass list. It only moves the layout copies this pipeline inserts (its `targets` is `LAYOUT_PERMUTE_COPY`), leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. As its own pass-list entry, the pass gets the pass manager's dtype-preserving retrace, so the folded int8 dtypes survive the sinking. Authored with an AI coding assistant (Claude). Differential Revision: D128001279
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Summary: On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3. `RemovePermutesAroundElementwiseOps` cancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes. Add `CortexMPostponeLayoutCopyBelowSqueezePass`, a restricted `PostponePermuteOpBelowSqueezeOrUnsqueezeLikeView`, and run it just before `RemovePermutesAroundElementwiseOps` in the explicit-layout pass list. It only moves the layout copies this pipeline inserts (its `targets` is `LAYOUT_PERMUTE_COPY`), leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. As its own pass-list entry, the pass gets the pass manager's dtype-preserving retrace, so the folded int8 dtypes survive the sinking. Authored with an AI coding assistant (Claude). Differential Revision: D128001279
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…pytorch#24153) Summary: `SharedQspecQuantizer` gives each shared-qparams cluster one set of qparams for every float input and output of its ops. `view_as(x, other)` is in that list, and the cluster was built from all of its inputs, so `other` was pulled in even though it contributes only its shape. `x` and `other` were then quantized with one scale, set by whichever has the wider range: the data loses precision, or the shape operand is clipped. For example, in `(x * y).view_as(other) + other` with `other = z + z`, `x * y` spans about ±2.5 and `other` about ±51. `x * y` was quantized at `other`'s scale of 0.349, about 18x coarser than the 0.0195 it gets when the same reshape is written `reshape(4, 8)`, and the output error against float rose from 0.258 to 0.307. `expand_as` has the same shape-only second operand but was not in the shared-qparams list at all, so every `expand_as` broadcast stayed in float behind a dequantize and a requantize. Shape-as ops (`view_as`, `expand_as`) now share qparams only through their data operand, `args[0]`. The cluster walk does not cross the edge to the shape operand in either direction, and that operand gets no shared input qspec, so it keeps the qparams of its own producer. `expand_as` joins the shared-qparams ops, so like `expand` it is quantized to int8 when its neighbours are, and lowers on Cortex-M to an int8 `expand_copy`. Authored with Claude Code. Reviewed By: rascani Differential Revision: D127380012
Summary: On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3. `RemovePermutesAroundElementwiseOps` cancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes. Add `CortexMPostponeLayoutCopyBelowSqueezePass`, a restricted `PostponePermuteOpBelowSqueezeOrUnsqueezeLikeView`, and run it just before `RemovePermutesAroundElementwiseOps` in the explicit-layout pass list. It only moves the layout copies this pipeline inserts (its `targets` is `LAYOUT_PERMUTE_COPY`), leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. As its own pass-list entry, the pass gets the pass manager's dtype-preserving retrace, so the folded int8 dtypes survive the sinking. Authored with an AI coding assistant (Claude). Differential Revision: D128001279
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Hi, this PR contains two changes in one, I think there is a mistake. Regarding adding a new pass for propagating permutes in this specific case, have you tried using the propagate permute passes from the arm backend which should handle this already? Or, if you prefer to keep a very small scoped change, it would be better to change the lowering to create the correct order initially rather than moving them around afterwards, that is more of a hack to me
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Summary:
On the explicit-layout pass list, a Conv1d is lowered as a Conv2d, so each convolution's NHWC output goes through a rank-4 layout copy followed by a squeeze back to rank 3.
RemovePermutesAroundElementwiseOpscancels permutes around a region of elementwise ops, but it can only cross a squeeze or unsqueeze while walking downstream. When a region walks upstream into a neighbouring convolution's output, for example through the second operand of a residual add, it reaches that squeeze from below, carrying a rank-3 permutation with a rank-4 permute behind it. It discards the whole region, and the layout copies between consecutive convolutions survive as transposes.Add
CortexMPostponeLayoutCopyBelowSqueezePass, a restrictedPostponePermuteOpBelowSqueezeOrUnsqueezeLikeView, and run it just beforeRemovePermutesAroundElementwiseOpsin the explicit-layout pass list. It only moves the layout copies this pipeline inserts (itstargetsisLAYOUT_PERMUTE_COPY), leaving user permutes in place, and never moves one below an unsqueeze, which would raise its rank, up to a rank-5 layout copy that Cortex-M cannot run. After sinking, a convolution output is a squeeze followed by a rank-3 layout copy, so regions meet copies of their own rank and cancel as they do for Conv2d. As its own pass-list entry, the pass gets the pass manager's dtype-preserving retrace, so the folded int8 dtypes survive the sinking.Authored with an AI coding assistant (Claude).
Differential Revision: D128001279