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AES PPC64LE: expand 16- and 32-byte keys four words at a time - #4751
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The 16- and 32-byte keys' schedules are computed in vector registers, a round key per iteration: vperm copies the last word (rotated, for RotWord) into every word, vsbox substitutes it, the round constant is XORed into the low byte of every word, and two vsldoi shifts and vxors form the prefix XORs of the four words before. 24-byte keys keep the word loop. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TKUFHHnFWTbduJrugwbFjS
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01TKUFHHnFWTbduJrugwbFjS
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Benchmarks on POWER9 (run 42527569434) against
At 16 KiB and 1 MiB, the changes are between 4.2% faster and 2.0% slower, which is noise: key expansion runs once per message. The AES-256 gains the most because its schedule has 52 words to compute against 40 for AES-128. In both, each step of four words replaces four iterations of the word loop and its GPR↔VSR round trip. The first dispatch's failure on this PR was a wrong Generated by Claude Code |
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Part of the PPC64LE performance work from #4141, following #4733.
ppc64le's AES key expansion (
vg_aes_expand_key,vg_aes_expand_key_scratch) computed every key length one word at a time in GPRs, with a GPR→VSR→vsbox→GPR round trip for each SubWord. 16- and 32-byte keys now compute a whole round key, four words, per step in vector registers. 24-byte keys keep #4733's word loop.How it works
Four consecutive words
w[j..j+3]are held as the 128-bit valuew[j+3] ‖ w[j+2] ‖ w[j+1] ‖ w[j], which is the schedule's 16 bytes read as one little-endian number. The next four words aretempXORed into the prefix XORs of the previous four (w[j],w[j] ⊕ w[j+1], …). Each step:vpermcopies the last word into every word, rotated by a byte for RotWord, or not;vsboxsubstitutes it;vxoradds the round constant, which is in the low byte of every word. It comes fromr6, computed as the word loop computes it, throughmtvsrdandvperm.vsldoishifts and twovxors form the prefixes.A 16-byte key runs 10 such steps. A 32-byte key runs 6 pairs of steps (SubWord(RotWord) with the constant, then SubWord alone), then a final step. Each step's four words are stored with one
stxvd2x. Every branch depends only on the key length or a count.Files
Impl/Aes/PPC64LE/Crypto/ExpandKey.lean: the dispatch on the key length and the vector loops. The word loop is unchanged, moved intowordTail.Proof/Aes/PPC64LE/Crypto/KeyVecBytes.lean(new): the byte-level facts.Rk: a vector register holds four schedule words.vbyte_sldoiandpfx_byte: the prefix XORs.step_rkandnext_pre: FIPS 197's recurrence, four words at a time.rot_tempandsub_temp: RotWord, SubWord and the round constant in every word.load_rkandstore_good: the schedule's 16-byte loads and stores.Proof/Aes/PPC64LE/Crypto/KeyVec.lean(new): each instruction group run symbolically, the loops' invariants (VInv4,VInv8) and the setup (VStart).Proof/Aes/PPC64LE/Crypto/ExpandKey.lean:expandKey_okdispatches like the code. Its statement is unchanged, so the contracts above it are unchanged.Proof/Aes/PPC64LE/Crypto/KeyCopy.lean: the copy loop's invariant allowsr0to change, because the length test writes it.There is no spec or TCB change. The constant-time proof is the existing
taint_decideover the new code.Checks run locally
lake buildandEmit.lean --check, after rebasing onmaincheck_lean_public_imports.pyon the edited modulesThere are no new tests: the existing AES vectors cover every key length. A benchmark run (
aes-*-gcm-newand AES-GCM-SIV on powerpc64, againstmain) follows in a comment.Generated by Claude Code