Hi I was wondering if an implementation for Intel GPUs is on your radar/roadmap at all - and how a PR for this should look like?
I'm currently letting Codex implement that on a very narrow scope, specifically for Qwen3.8 27B GPTQ INT4 with the target beeing to match vLLM performance and ideally improve upon. Also started getting EXL3 to work, but sinc eI have a good reference for the INT4 model I switched to this first.
What does a PR need to have to be accepted?
Current code can be found here: https://github.com/Danmoreng/vllm.cpp/tree/b70-gptq-int4
Hi I was wondering if an implementation for Intel GPUs is on your radar/roadmap at all - and how a PR for this should look like?
I'm currently letting Codex implement that on a very narrow scope, specifically for Qwen3.8 27B GPTQ INT4 with the target beeing to match vLLM performance and ideally improve upon. Also started getting EXL3 to work, but sinc eI have a good reference for the INT4 model I switched to this first.
What does a PR need to have to be accepted?
Current code can be found here: https://github.com/Danmoreng/vllm.cpp/tree/b70-gptq-int4