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Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "This is the main MIPS pull request for 4.9: MIPS core arch code: - traps: 64bit kernels should read CP0_EBase 64bit - traps: Convert ebase to KSEG0 - c-r4k: Drop bc_wback_inv() from icache flush - c-r4k: Split user/kernel flush_icache_range() - cacheflush: Use __flush_icache_user_range() - uprobes: Flush icache via kernel address - KVM: Use __local_flush_icache_user_range() - c-r4k: Fix flush_icache_range() for EVA - Fix -mabi=64 build of vdso.lds - VDSO: Drop duplicated -I*/-E* aflags - tracing: move insn_has_delay_slot to a shared header - tracing: disable uprobe/kprobe on compact branch instructions - ptrace: Fix regs_return_value for kernel context - Squash lines for simple wrapper functions - Move identification of VP(E) into proc.c from smp-mt.c - Add definitions of SYNC barrierstype values - traps: Ensure full EBase is written - tlb-r4k: If there are wired entries, don't use TLBINVF - Sanitise coherentio semantics - dma-default: Don't check hw_coherentio if device is non-coherent - Support per-device DMA coherence - Adjust MIPS64 CAC_BASE to reflect Config.K0 - Support generating Flattened Image Trees (.itb) - generic: Introduce generic DT-based board support - generic: Convert SEAD-3 to a generic board - Enable hardened usercopy - Don't specify STACKPROTECTOR in defconfigs Octeon: - Delete dead code and files across the platform. - Change to use all memory into use by default. - Rename upper case variables in setup code to lowercase. - Delete legacy hack for broken bootloaders. - Leave maintaining the link state to the actual ethernet/PHY drivers. - Add DTS for D-Link DSR-500N. - Fix PCI interrupt routing on D-Link DSR-500N. Pistachio: - Remove ANDROID_TIMED_OUTPUT from defconfig TX39xx: - Move GPIO setup from .mem_setup() to .arch_init() - Convert to Common Clock Framework TX49xx: - Move GPIO setup from .mem_setup() to .arch_init() - Convert to Common Clock Framework txx9wdt: - Add missing clock (un)prepare calls for CCF BMIPS: - Add PW, GPIO SDHCI and NAND device node names - Support APPENDED_DTB - Add missing bcm97435svmb to DT_NONE - Rename bcm96358nb4ser to bcm6358-neufbox4-sercom - Add DT examples for BCM63268, BCM3368 and BCM6362 - Add support for BCM3368 and BCM6362 PCI - Reduce stack frame usage - Use struct list_head lists - Support for CONFIG_PCI_DOMAINS_GENERIC - Make pcibios_set_cache_line_size an initcall - Inline pcibios_assign_all_busses - Split pci.c into pci.c & pci-legacy.c - Introduce CONFIG_PCI_DRIVERS_LEGACY - Support generic drivers CPC - Convert bare 'unsigned' to 'unsigned int' - Avoid lock when MIPS CM >= 3 is present GIC: - Delete unused file smp-gic.c mt7620: - Delete unnecessary assignment for the field "owner" from PCI BCM63xx: - Let clk_disable() return immediately if clk is NULL pm-cps: - Change FSB workaround to CPU blacklist - Update comments on barrier instructions - Use MIPS standard lightweight ordering barrier - Use MIPS standard completion barrier - Remove selection of sync types - Add MIPSr6 CPU support - Support CM3 changes to Coherence Enable Register SMP: - Wrap call to mips_cpc_lock_other in mips_cm_lock_other - Introduce mechanism for freeing and allocating IPIs cpuidle: - cpuidle-cps: Enable use with MIPSr6 CPUs. SEAD3: - Rewrite to use DT and generic kernel feature. USB: - host: ehci-sead3: Remove SEAD-3 EHCI code FBDEV: - cobalt_lcdfb: Drop SEAD3 support dt-bindings: - Document a binding for simple ASCII LCDs auxdisplay: - img-ascii-lcd: driver for simple ASCII LCD displays irqchip i8259: - i8259: Add domain before mapping parent irq - i8259: Allow platforms to override poll function - i8259: Remove unused i8259A_irq_pending Malta: - Rewrite to use DT of/platform: - Probe "isa" busses by default CM: - Print CM error reports upon bus errors Module: - Migrate exception table users off module.h and onto extable.h - Make various drivers explicitly non-modular: - Audit and remove any unnecessary uses of module.h mailmap: - Canonicalize to Qais' current email address. Documentation: - MIPS supports HAVE_REGS_AND_STACK_ACCESS_API Loongson1C: - Add CPU support for Loongson1C - Add board support - Add defconfig - Add RTC support for Loongson1C board All this except one Documentation fix has sat in linux-next and has survived Imagination's automated build test system" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (127 commits) Documentation: MIPS supports HAVE_REGS_AND_STACK_ACCESS_API MIPS: ptrace: Fix regs_return_value for kernel context MIPS: VDSO: Drop duplicated -I*/-E* aflags MIPS: Fix -mabi=64 build of vdso.lds MIPS: Enable hardened usercopy MIPS: generic: Convert SEAD-3 to a generic board MIPS: generic: Introduce generic DT-based board support MIPS: Support generating Flattened Image Trees (.itb) MIPS: Adjust MIPS64 CAC_BASE to reflect Config.K0 MIPS: Print CM error reports upon bus errors MIPS: Support per-device DMA coherence MIPS: dma-default: Don't check hw_coherentio if device is non-coherent MIPS: Sanitise coherentio semantics MIPS: PCI: Support generic drivers MIPS: PCI: Introduce CONFIG_PCI_DRIVERS_LEGACY MIPS: PCI: Split pci.c into pci.c & pci-legacy.c MIPS: PCI: Inline pcibios_assign_all_busses MIPS: PCI: Make pcibios_set_cache_line_size an initcall MIPS: PCI: Support for CONFIG_PCI_DOMAINS_GENERIC MIPS: PCI: Use struct list_head lists ...
2 parents 050aaea + 38b8767 commit 133d970

226 files changed

Lines changed: 5242 additions & 3657 deletions

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.mailmap

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -127,6 +127,7 @@ Peter Oruba <peter@oruba.de>
127127
Peter Oruba <peter.oruba@amd.com>
128128
Pratyush Anand <pratyush.anand@gmail.com> <pratyush.anand@st.com>
129129
Praveen BP <praveenbp@ti.com>
130+
Qais Yousef <qsyousef@gmail.com> <qais.yousef@imgtec.com>
130131
Rajesh Shah <rajesh.shah@intel.com>
131132
Ralf Baechle <ralf@linux-mips.org>
132133
Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
Binding for ASCII LCD displays on Imagination Technologies boards
2+
3+
Required properties:
4+
- compatible : should be one of:
5+
"img,boston-lcd"
6+
"mti,malta-lcd"
7+
"mti,sead3-lcd"
8+
9+
Required properties for "img,boston-lcd":
10+
- reg : memory region locating the device registers
11+
12+
Required properties for "mti,malta-lcd" or "mti,sead3-lcd":
13+
- regmap: phandle of the system controller containing the LCD registers
14+
- offset: offset in bytes to the LCD registers within the system controller
15+
16+
The layout of the registers & properties of the display are determined
17+
from the compatible string, making this binding somewhat trivial.

Documentation/devicetree/bindings/mips/brcm/soc.txt

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,9 +2,9 @@
22

33
Required properties:
44

5-
- compatible: "brcm,bcm3384", "brcm,bcm33843"
5+
- compatible: "brcm,bcm3368", "brcm,bcm3384", "brcm,bcm33843"
66
"brcm,bcm3384-viper", "brcm,bcm33843-viper"
7-
"brcm,bcm6328", "brcm,bcm6358", "brcm,bcm6368",
7+
"brcm,bcm6328", "brcm,bcm6358", "brcm,bcm6362", "brcm,bcm6368",
88
"brcm,bcm63168", "brcm,bcm63268",
99
"brcm,bcm7125", "brcm,bcm7346", "brcm,bcm7358", "brcm,bcm7360",
1010
"brcm,bcm7362", "brcm,bcm7420", "brcm,bcm7425"

Documentation/features/perf/kprobes-event/arch-support.txt

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,7 @@
2222
| m68k: | TODO |
2323
| metag: | TODO |
2424
| microblaze: | TODO |
25-
| mips: | TODO |
25+
| mips: | ok |
2626
| mn10300: | TODO |
2727
| nios2: | TODO |
2828
| openrisc: | TODO |

MAINTAINERS

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@@ -6131,6 +6131,12 @@ M: Stanislaw Gruszka <stf_xl@wp.pl>
61316131
S: Maintained
61326132
F: drivers/usb/atm/ueagle-atm.c
61336133

6134+
IMGTEC ASCII LCD DRIVER
6135+
M: Paul Burton <paul.burton@imgtec.com>
6136+
S: Maintained
6137+
F: Documentation/devicetree/bindings/auxdisplay/img-ascii-lcd.txt
6138+
F: drivers/auxdisplay/img-ascii-lcd.c
6139+
61346140
INA209 HARDWARE MONITOR DRIVER
61356141
M: Guenter Roeck <linux@roeck-us.net>
61366142
L: linux-hwmon@vger.kernel.org

arch/mips/Kbuild.platforms

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,14 +11,14 @@ platforms += cavium-octeon
1111
platforms += cobalt
1212
platforms += dec
1313
platforms += emma
14+
platforms += generic
1415
platforms += jazz
1516
platforms += jz4740
1617
platforms += lantiq
1718
platforms += lasat
1819
platforms += loongson32
1920
platforms += loongson64
2021
platforms += mti-malta
21-
platforms += mti-sead3
2222
platforms += netlogic
2323
platforms += paravirt
2424
platforms += pic32

arch/mips/Kconfig

Lines changed: 83 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -65,13 +65,65 @@ config MIPS
6565
select HANDLE_DOMAIN_IRQ
6666
select HAVE_EXIT_THREAD
6767
select HAVE_REGS_AND_STACK_ACCESS_API
68+
select HAVE_ARCH_HARDENED_USERCOPY
6869

6970
menu "Machine selection"
7071

7172
choice
7273
prompt "System type"
7374
default SGI_IP22
7475

76+
config MIPS_GENERIC
77+
bool "Generic board-agnostic MIPS kernel"
78+
select BOOT_RAW
79+
select BUILTIN_DTB
80+
select CEVT_R4K
81+
select CLKSRC_MIPS_GIC
82+
select COMMON_CLK
83+
select CPU_MIPSR2_IRQ_VI
84+
select CPU_MIPSR2_IRQ_EI
85+
select CSRC_R4K
86+
select DMA_PERDEV_COHERENT
87+
select HW_HAS_PCI
88+
select IRQ_MIPS_CPU
89+
select LIBFDT
90+
select MIPS_CPU_SCACHE
91+
select MIPS_GIC
92+
select MIPS_L1_CACHE_SHIFT_7
93+
select NO_EXCEPT_FILL
94+
select PCI_DRIVERS_GENERIC
95+
select PINCTRL
96+
select SMP_UP if SMP
97+
select SYS_HAS_CPU_MIPS32_R1
98+
select SYS_HAS_CPU_MIPS32_R2
99+
select SYS_HAS_CPU_MIPS32_R6
100+
select SYS_HAS_CPU_MIPS64_R1
101+
select SYS_HAS_CPU_MIPS64_R2
102+
select SYS_HAS_CPU_MIPS64_R6
103+
select SYS_SUPPORTS_32BIT_KERNEL
104+
select SYS_SUPPORTS_64BIT_KERNEL
105+
select SYS_SUPPORTS_BIG_ENDIAN
106+
select SYS_SUPPORTS_HIGHMEM
107+
select SYS_SUPPORTS_LITTLE_ENDIAN
108+
select SYS_SUPPORTS_MICROMIPS
109+
select SYS_SUPPORTS_MIPS_CPS
110+
select SYS_SUPPORTS_MIPS16
111+
select SYS_SUPPORTS_MULTITHREADING
112+
select SYS_SUPPORTS_RELOCATABLE
113+
select SYS_SUPPORTS_SMARTMIPS
114+
select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
115+
select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
116+
select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
117+
select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
118+
select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
119+
select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
120+
select USE_OF
121+
help
122+
Select this to build a kernel which aims to support multiple boards,
123+
generally using a flattened device tree passed from the bootloader
124+
using the boot protocol defined in the UHI (Unified Hosting
125+
Interface) specification.
126+
75127
config MIPS_ALCHEMY
76128
bool "Alchemy processor based machines"
77129
select ARCH_PHYS_ADDR_T_64BIT
@@ -478,6 +530,7 @@ config MIPS_MALTA
478530
select SYS_SUPPORTS_ZBOOT
479531
select SYS_SUPPORTS_RELOCATABLE
480532
select USE_OF
533+
select LIBFDT
481534
select ZONE_DMA32 if 64BIT
482535
select BUILTIN_DTB
483536
select LIBFDT
@@ -493,42 +546,6 @@ config MACH_PIC32
493546
Microchip PIC32 is a family of general-purpose 32 bit MIPS core
494547
microcontrollers.
495548

496-
config MIPS_SEAD3
497-
bool "MIPS SEAD3 board"
498-
select BOOT_ELF32
499-
select BOOT_RAW
500-
select BUILTIN_DTB
501-
select CEVT_R4K
502-
select CSRC_R4K
503-
select CLKSRC_MIPS_GIC
504-
select COMMON_CLK
505-
select CPU_MIPSR2_IRQ_VI
506-
select CPU_MIPSR2_IRQ_EI
507-
select DMA_NONCOHERENT
508-
select IRQ_MIPS_CPU
509-
select MIPS_GIC
510-
select LIBFDT
511-
select MIPS_MSC
512-
select SYS_HAS_CPU_MIPS32_R1
513-
select SYS_HAS_CPU_MIPS32_R2
514-
select SYS_HAS_CPU_MIPS32_R6
515-
select SYS_HAS_CPU_MIPS64_R1
516-
select SYS_HAS_EARLY_PRINTK
517-
select SYS_SUPPORTS_32BIT_KERNEL
518-
select SYS_SUPPORTS_64BIT_KERNEL
519-
select SYS_SUPPORTS_BIG_ENDIAN
520-
select SYS_SUPPORTS_LITTLE_ENDIAN
521-
select SYS_SUPPORTS_SMARTMIPS
522-
select SYS_SUPPORTS_MICROMIPS
523-
select SYS_SUPPORTS_MIPS16
524-
select SYS_SUPPORTS_RELOCATABLE
525-
select USB_EHCI_BIG_ENDIAN_DESC
526-
select USB_EHCI_BIG_ENDIAN_MMIO
527-
select USE_OF
528-
help
529-
This enables support for the MIPS Technologies SEAD3 evaluation
530-
board.
531-
532549
config NEC_MARKEINS
533550
bool "NEC EMMA2RH Mark-eins board"
534551
select SOC_EMMA2RH
@@ -988,6 +1005,7 @@ source "arch/mips/ath79/Kconfig"
9881005
source "arch/mips/bcm47xx/Kconfig"
9891006
source "arch/mips/bcm63xx/Kconfig"
9901007
source "arch/mips/bmips/Kconfig"
1008+
source "arch/mips/generic/Kconfig"
9911009
source "arch/mips/jazz/Kconfig"
9921010
source "arch/mips/jz4740/Kconfig"
9931011
source "arch/mips/lantiq/Kconfig"
@@ -1098,6 +1116,10 @@ config DMA_MAYBE_COHERENT
10981116
select DMA_NONCOHERENT
10991117
bool
11001118

1119+
config DMA_PERDEV_COHERENT
1120+
bool
1121+
select DMA_MAYBE_COHERENT
1122+
11011123
config DMA_COHERENT
11021124
bool
11031125

@@ -1401,6 +1423,16 @@ config CPU_LOONGSON1B
14011423
The Loongson 1B is a 32-bit SoC, which implements the MIPS32
14021424
release 2 instruction set.
14031425

1426+
config CPU_LOONGSON1C
1427+
bool "Loongson 1C"
1428+
depends on SYS_HAS_CPU_LOONGSON1C
1429+
select CPU_LOONGSON1
1430+
select ARCH_WANT_OPTIONAL_GPIOLIB
1431+
select LEDS_GPIO_REGISTER
1432+
help
1433+
The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1434+
release 2 instruction set.
1435+
14041436
config CPU_MIPS32_R1
14051437
bool "MIPS32 Release 1"
14061438
depends on SYS_HAS_CPU_MIPS32_R1
@@ -1850,6 +1882,9 @@ config SYS_HAS_CPU_LOONGSON2F
18501882
config SYS_HAS_CPU_LOONGSON1B
18511883
bool
18521884

1885+
config SYS_HAS_CPU_LOONGSON1C
1886+
bool
1887+
18531888
config SYS_HAS_CPU_MIPS32_R1
18541889
bool
18551890

@@ -2906,7 +2941,7 @@ endchoice
29062941
choice
29072942
prompt "Kernel command line type" if !CMDLINE_OVERRIDE
29082943
default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2909-
!MIPS_MALTA && !MIPS_SEAD3 && \
2944+
!MIPS_MALTA && \
29102945
!CAVIUM_OCTEON_SOC
29112946
default MIPS_CMDLINE_FROM_BOOTLOADER
29122947

@@ -2960,7 +2995,6 @@ config PCI
29602995
bool "Support for PCI controller"
29612996
depends on HW_HAS_PCI
29622997
select PCI_DOMAINS
2963-
select NO_GENERIC_PCI_IOPORT_MAP
29642998
help
29652999
Find out whether you have a PCI motherboard. PCI is the name of a
29663000
bus system, i.e. the way the CPU talks to the other stuff inside
@@ -2981,6 +3015,17 @@ config HT_PCI
29813015
config PCI_DOMAINS
29823016
bool
29833017

3018+
config PCI_DOMAINS_GENERIC
3019+
bool
3020+
3021+
config PCI_DRIVERS_GENERIC
3022+
select PCI_DOMAINS_GENERIC if PCI_DOMAINS
3023+
bool
3024+
3025+
config PCI_DRIVERS_LEGACY
3026+
def_bool !PCI_DRIVERS_GENERIC
3027+
select NO_GENERIC_PCI_IOPORT_MAP
3028+
29843029
source "drivers/pci/Kconfig"
29853030

29863031
#

arch/mips/Makefile

Lines changed: 76 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -262,7 +262,14 @@ KBUILD_CPPFLAGS += -DVMLINUX_LOAD_ADDRESS=$(load-y)
262262
KBUILD_CPPFLAGS += -DDATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)
263263

264264
bootvars-y = VMLINUX_LOAD_ADDRESS=$(load-y) \
265-
VMLINUX_ENTRY_ADDRESS=$(entry-y)
265+
VMLINUX_ENTRY_ADDRESS=$(entry-y) \
266+
PLATFORM=$(platform-y)
267+
ifdef CONFIG_32BIT
268+
bootvars-y += ADDR_BITS=32
269+
endif
270+
ifdef CONFIG_64BIT
271+
bootvars-y += ADDR_BITS=64
272+
endif
266273

267274
LDFLAGS += -m $(ld-emul)
268275

@@ -302,6 +309,11 @@ boot-y += uImage.gz
302309
boot-y += uImage.lzma
303310
boot-y += uImage.lzo
304311
endif
312+
boot-y += vmlinux.itb
313+
boot-y += vmlinux.gz.itb
314+
boot-y += vmlinux.bz2.itb
315+
boot-y += vmlinux.lzma.itb
316+
boot-y += vmlinux.lzo.itb
305317

306318
# compressed boot image targets (arch/mips/boot/compressed/)
307319
bootz-y := vmlinuz
@@ -425,4 +437,67 @@ define archhelp
425437
echo ' dtbs_install - Install dtbs to $(INSTALL_DTBS_PATH)'
426438
echo
427439
echo ' These will be default as appropriate for a configured platform.'
440+
echo
441+
echo ' If you are targeting a system supported by generic kernels you may'
442+
echo ' configure the kernel for a given architecture target like so:'
443+
echo
444+
echo ' {micro32,32,64}{r1,r2,r6}{el,}_defconfig <BOARDS="list of boards">'
445+
echo
446+
echo ' Otherwise, the following default configurations are available:'
428447
endef
448+
449+
generic_config_dir = $(srctree)/arch/$(ARCH)/configs/generic
450+
generic_defconfigs :=
451+
452+
#
453+
# If the user generates a generic kernel configuration without specifying a
454+
# list of boards to include the config fragments for, default to including all
455+
# available board config fragments.
456+
#
457+
ifeq ($(BOARDS),)
458+
BOARDS = $(patsubst board-%.config,%,$(notdir $(wildcard $(generic_config_dir)/board-*.config)))
459+
endif
460+
461+
#
462+
# Generic kernel configurations which merge generic_defconfig with the
463+
# appropriate config fragments from arch/mips/configs/generic/, resulting in
464+
# the ability to easily configure the kernel for a given architecture,
465+
# endianness & set of boards without duplicating the needed configuration in
466+
# hundreds of defconfig files.
467+
#
468+
define gen_generic_defconfigs
469+
$(foreach bits,$(1),$(foreach rev,$(2),$(foreach endian,$(3),
470+
target := $(bits)$(rev)$(filter el,$(endian))_defconfig
471+
generic_defconfigs += $$(target)
472+
$$(target): $(generic_config_dir)/$(bits)$(rev).config
473+
$$(target): $(generic_config_dir)/$(endian).config
474+
)))
475+
endef
476+
477+
$(eval $(call gen_generic_defconfigs,32 64,r1 r2 r6,eb el))
478+
$(eval $(call gen_generic_defconfigs,micro32,r2,eb el))
479+
480+
.PHONY: $(generic_defconfigs)
481+
$(generic_defconfigs):
482+
$(Q)$(CONFIG_SHELL) $(srctree)/scripts/kconfig/merge_config.sh \
483+
-m -O $(objtree) $(srctree)/arch/$(ARCH)/configs/generic_defconfig $^ \
484+
$(foreach board,$(BOARDS),$(generic_config_dir)/board-$(board).config)
485+
$(Q)$(MAKE) olddefconfig
486+
487+
#
488+
# Prevent generic merge_config rules attempting to merge single fragments
489+
#
490+
$(generic_config_dir)/%.config: ;
491+
492+
#
493+
# Legacy defconfig compatibility - these targets used to be real defconfigs but
494+
# now that the boards have been converted to use the generic kernel they are
495+
# wrappers around the generic rules above.
496+
#
497+
.PHONY: sead3_defconfig
498+
sead3_defconfig:
499+
$(Q)$(MAKE) 32r2el_defconfig BOARDS=sead-3
500+
501+
.PHONY: sead3micro_defconfig
502+
sead3micro_defconfig:
503+
$(Q)$(MAKE) micro32r2el_defconfig BOARDS=sead-3

arch/mips/alchemy/common/setup.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -48,17 +48,17 @@ void __init plat_mem_setup(void)
4848
clear_c0_config(1 << 19); /* Clear Config[OD] */
4949

5050
hw_coherentio = 0;
51-
coherentio = 1;
51+
coherentio = IO_COHERENCE_ENABLED;
5252
switch (alchemy_get_cputype()) {
5353
case ALCHEMY_CPU_AU1000:
5454
case ALCHEMY_CPU_AU1500:
5555
case ALCHEMY_CPU_AU1100:
56-
coherentio = 0;
56+
coherentio = IO_COHERENCE_DISABLED;
5757
break;
5858
case ALCHEMY_CPU_AU1200:
5959
/* Au1200 AB USB does not support coherent memory */
6060
if (0 == (read_c0_prid() & PRID_REV_MASK))
61-
coherentio = 0;
61+
coherentio = IO_COHERENCE_DISABLED;
6262
break;
6363
}
6464

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