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Merge tag 'dmaengine-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "Core: - New devm_of_dma_controller_register() API New Support: - Support for RZ/G3L SoC - Loongson Multi-Channel DMA controller support - Conversion of Xilinx AXI DMA binding - DW AXI CV1800B DMA support - Switchtec DMA engine driver Updates: - AMD MDB Endpoint and non-LL mode support - DW edma virtual IRQ for interrupt-emulation, cyclic transfers support" * tag 'dmaengine-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (65 commits) dmaengine: dw-edma: Add non-LL mode dmaengine: dw-edma: Add AMD MDB Endpoint Support dt-bindings: dmaengine: Fix spelling mistake "Looongson" -> "Looogson" dmaengine: loongson: Fix spelling mistake "Looongson" -> "Looogson" dmaengine: loongson: New driver for the Loongson Multi-Channel DMA controller dt-bindings: dmaengine: Add Loongson Multi-Channel DMA controller dmaengine: loongson: loongson2-apb: Simplify locking with guard() and scoped_guard() dmaengine: loongson: loongson2-apb: Convert to devm_clk_get_enabled() dmaengine: loongson: loongson2-apb: Convert to dmaenginem_async_device_register() dmaengine: loongson: New directory for Loongson DMA controllers drivers dt-bindings: dma: xlnx,axi-dma: Convert to DT schema dt-bindings: dma: rz-dmac: Add conditional schema for RZ/G3L dmaengine: sh: rz-dmac: Add device_{pause,resume}() callbacks dmaengine: sh: rz-dmac: Add device_tx_status() callback dmaengine: sh: rz-dmac: Use rz_lmdesc_setup() to invalidate descriptors dmaengine: sh: rz-dmac: Drop unnecessary local_irq_save() call dmaengine: sh: rz-dmac: Drop goto instruction and label dmaengine: sh: rz-dmac: Drop read of CHCTRL register dmaengine: sh: rz_dmac: add RZ/{T2H,N2H} support dt-bindings: dma: renesas,rz-dmac: document RZ/{T2H,N2H} ...
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/dma/loongson,ls2k0300-dma.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Loongson-2 Multi-Channel DMA controller
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description:
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The Loongson-2 Multi-Channel DMA controller is used for transferring data
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between system memory and the peripherals on the APB bus.
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maintainers:
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- Binbin Zhou <zhoubinbin@loongson.cn>
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allOf:
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- $ref: dma-controller.yaml#
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properties:
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compatible:
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enum:
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- loongson,ls2k0300-dma
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- loongson,ls2k3000-dma
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reg:
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maxItems: 1
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interrupts:
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description:
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Should contain all of the per-channel DMA interrupts in ascending order
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with respect to the DMA channel index.
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minItems: 4
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maxItems: 8
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clocks:
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maxItems: 1
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'#dma-cells':
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const: 2
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description: |
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DMA request from clients consists of 2 cells:
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1. Channel index
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2. Transfer request factor number, If no transfer factor, use 0.
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The number is SoC-specific, and this should be specified with
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relation to the device to use the DMA controller.
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dma-channels:
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enum: [4, 8]
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- '#dma-cells'
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- dma-channels
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/clock/loongson,ls2k-clk.h>
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dma-controller@1612c000 {
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compatible = "loongson,ls2k0300-dma";
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reg = <0x1612c000 0xff>;
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interrupt-parent = <&liointc0>;
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interrupts = <23 IRQ_TYPE_LEVEL_HIGH>,
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<24 IRQ_TYPE_LEVEL_HIGH>,
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<25 IRQ_TYPE_LEVEL_HIGH>,
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<26 IRQ_TYPE_LEVEL_HIGH>,
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<27 IRQ_TYPE_LEVEL_HIGH>,
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<28 IRQ_TYPE_LEVEL_HIGH>,
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<29 IRQ_TYPE_LEVEL_HIGH>,
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<30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk LS2K0300_CLK_APB_GATE>;
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#dma-cells = <2>;
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dma-channels = <8>;
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};
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...

Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml

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- renesas,r9a07g044-dmac # RZ/G2{L,LC}
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- renesas,r9a07g054-dmac # RZ/V2L
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- renesas,r9a08g045-dmac # RZ/G3S
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- renesas,r9a08g046-dmac # RZ/G3L
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- const: renesas,rz-dmac
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- items:
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- const: renesas,r9a09g057-dmac # RZ/V2H(P)
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- const: renesas,r9a09g077-dmac # RZ/T2H
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- items:
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- enum:
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- renesas,r9a09g087-dmac # RZ/N2H
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- const: renesas,r9a09g077-dmac
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reg:
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items:
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- description: Control and channel register block
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- description: DMA extended resource selector block
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minItems: 1
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interrupts:
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minItems: 16
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maxItems: 17
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interrupt-names:
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items:
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- const: error
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- const: ch0
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- const: ch1
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- const: ch2
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- const: ch3
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- const: ch4
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- const: ch5
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- const: ch6
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- const: ch7
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- const: ch8
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- const: ch9
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- const: ch10
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- const: ch11
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- const: ch12
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- const: ch13
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- const: ch14
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- const: ch15
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minItems: 16
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maxItems: 17
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clocks:
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items:
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allOf:
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- $ref: dma-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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enum:
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- renesas,rz-dmac
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- renesas,r9a09g057-dmac
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then:
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properties:
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interrupt-names:
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items:
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- const: error
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- const: ch0
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- const: ch1
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- const: ch2
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- const: ch3
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- const: ch4
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- const: ch5
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- const: ch6
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- const: ch7
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- const: ch8
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- const: ch9
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- const: ch10
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- const: ch11
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- const: ch12
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- const: ch13
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- const: ch14
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- const: ch15
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- if:
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properties:
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compatible:
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- renesas,r9a07g044-dmac
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- renesas,r9a07g054-dmac
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- renesas,r9a08g045-dmac
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- renesas,r9a08g046-dmac
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then:
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properties:
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reg:
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- renesas,icu
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- resets
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- if:
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properties:
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compatible:
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contains:
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const: renesas,r9a09g077-dmac
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then:
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properties:
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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clock-names: false
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resets: false
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reset-names: false
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interrupts:
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maxItems: 16
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interrupt-names:
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items:
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- const: ch0
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- const: ch1
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- const: ch2
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- const: ch3
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- const: ch4
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- const: ch5
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- const: ch6
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- const: ch7
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- const: ch8
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- const: ch9
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- const: ch10
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- const: ch11
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- const: ch12
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- const: ch13
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- const: ch14
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- const: ch15
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required:
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- clocks
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- power-domains
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- renesas,icu
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additionalProperties: false
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examples:

Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml

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- enum:
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- snps,axi-dma-1.01a
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- intel,kmb-axi-dma
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- sophgo,cv1800b-axi-dma
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- starfive,jh7110-axi-dma
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- starfive,jh8100-axi-dma
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- items:
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dma-noncoherent: true
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dma-coherent: true
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resets:
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minItems: 1
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maxItems: 2

Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt

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