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drm/msm/dsi: fix hdisplay calculation when programming dsi registers
Recently, the hdisplay calculation is working for 3:1 compressed ratio only. If we have a video panel with DSC BPP = 8, and BPC = 10, we still use the default bits_per_pclk = 24, then we get the wrong hdisplay. We can draw the conclusion by cross-comparing the calculation with the calculation in dsi_adjust_pclk_for_compression(). Since CMD mode does not use this, we can remove !(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO) safely. Fixes: efcbd6f ("drm/msm/dsi: Enable widebus for DSI") Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Patchwork: https://patchwork.freedesktop.org/patch/704822/ Link: https://lore.kernel.org/r/20260214105145.105308-1-mitltlatltl@gmail.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
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Lines changed: 8 additions & 6 deletions

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drivers/gpu/drm/msm/dsi/dsi_host.c

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -993,7 +993,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
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if (msm_host->dsc) {
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struct drm_dsc_config *dsc = msm_host->dsc;
996-
u32 bytes_per_pclk;
996+
u32 bits_per_pclk;
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/* update dsc params with timing params */
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if (!dsc || !mode->hdisplay || !mode->vdisplay) {
@@ -1015,7 +1015,9 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
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/*
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* DPU sends 3 bytes per pclk cycle to DSI. If widebus is
1018-
* enabled, bus width is extended to 6 bytes.
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* enabled, MDP always sends out 48-bit compressed data per
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* pclk and on average, DSI consumes an amount of compressed
1020+
* data equivalent to the uncompressed pixel depth per pclk.
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*
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* Calculate the number of pclks needed to transmit one line of
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* the compressed data.
@@ -1027,12 +1029,12 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
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* unused anyway.
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*/
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h_total -= hdisplay;
1030-
if (wide_bus_enabled && !(msm_host->mode_flags & MIPI_DSI_MODE_VIDEO))
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bytes_per_pclk = 6;
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if (wide_bus_enabled)
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bits_per_pclk = mipi_dsi_pixel_format_to_bpp(msm_host->format);
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else
1033-
bytes_per_pclk = 3;
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bits_per_pclk = 24;
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1035-
hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc), bytes_per_pclk);
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hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc) * 8, bits_per_pclk);
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h_total += hdisplay;
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ha_end = ha_start + hdisplay;

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