@@ -17,8 +17,8 @@ static void _FWDownloadEnable(struct adapter *padapter, bool enable)
1717
1818 if (enable ) {
1919 /* 8051 enable */
20- tmp = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
21- rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , tmp | 0x04 );
20+ tmp = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
21+ rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , tmp | 0x04 );
2222
2323 tmp = rtw_read8 (padapter , REG_MCUFWDL );
2424 rtw_write8 (padapter , REG_MCUFWDL , tmp |0x01 );
@@ -158,23 +158,23 @@ void _8051Reset8723(struct adapter *padapter)
158158 /* Reset 8051(WLMCU) IO wrapper */
159159 /* 0x1c[8] = 0 */
160160 /* Suggested by Isaac@SD1 and Gimmy@SD1, coding by Lucas@20130624 */
161- io_rst = rtw_read8 (padapter , REG_RSV_CTRL + 1 );
161+ io_rst = rtw_read8 (padapter , REG_RSV_CTRL + 1 );
162162 io_rst &= ~BIT (0 );
163- rtw_write8 (padapter , REG_RSV_CTRL + 1 , io_rst );
163+ rtw_write8 (padapter , REG_RSV_CTRL + 1 , io_rst );
164164
165- cpu_rst = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
165+ cpu_rst = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
166166 cpu_rst &= ~BIT (2 );
167- rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , cpu_rst );
167+ rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , cpu_rst );
168168
169169 /* Enable 8051 IO wrapper */
170170 /* 0x1c[8] = 1 */
171- io_rst = rtw_read8 (padapter , REG_RSV_CTRL + 1 );
171+ io_rst = rtw_read8 (padapter , REG_RSV_CTRL + 1 );
172172 io_rst |= BIT (0 );
173- rtw_write8 (padapter , REG_RSV_CTRL + 1 , io_rst );
173+ rtw_write8 (padapter , REG_RSV_CTRL + 1 , io_rst );
174174
175- cpu_rst = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
175+ cpu_rst = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
176176 cpu_rst |= BIT (2 );
177- rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , cpu_rst );
177+ rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , cpu_rst );
178178}
179179
180180u8 g_fwdl_chksum_fail ;
@@ -268,19 +268,19 @@ void rtl8723b_FirmwareSelfReset(struct adapter *padapter)
268268 /* 0x1cf = 0x20. Inform 8051 to reset. 2009.12.25. tynli_test */
269269 rtw_write8 (padapter , REG_HMETFR + 3 , 0x20 );
270270
271- val = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
271+ val = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
272272 while (val & BIT2 ) {
273273 Delay -- ;
274274 if (Delay == 0 )
275275 break ;
276276 udelay (50 );
277- val = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
277+ val = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
278278 }
279279
280280 if (Delay == 0 ) {
281281 /* force firmware reset */
282- val = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
283- rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , val & (~BIT2 ));
282+ val = rtw_read8 (padapter , REG_SYS_FUNC_EN + 1 );
283+ rtw_write8 (padapter , REG_SYS_FUNC_EN + 1 , val & (~BIT2 ));
284284 }
285285 }
286286}
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