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Ketan Patilkrzk
Ketan Patil
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krzk
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memory: tegra: Add MC error logging support for Tegra264
In Tegra264, different components from memory subsystems like Memory Controller Fabric (MCF), HUB, HUB Common (HUBC), Side Band Shim (SBS) and channels have different interrupt lines for receiving memory controller error interrupts. Add support for logging memory controller errors reported by these memory subsystems on Tegra264 by: - Renaming tegra_mc_error_names array to tegra20_mc_error_names because it has a different bit index for error names compared to Tegra264. - Defining the intmask registers and mask values supported for Tegra264. - Registering interrupt handlers for interrupts associated with these different MC components which read the interrupt status registers to determine the type of violation that occurred. Signed-off-by: Ketan Patil <ketanp@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Link: https://patch.msgid.link/20260226163115.1152181-7-ketanp@nvidia.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
1 parent 9f26145 commit 8216906

4 files changed

Lines changed: 484 additions & 10 deletions

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‎drivers/memory/tegra/mc.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -690,7 +690,7 @@ irqreturn_t tegra30_mc_handle_irq(int irq, void *data)
690690

691691
type = (value & mc->soc->mc_err_status_type_mask) >>
692692
MC_ERR_STATUS_TYPE_SHIFT;
693-
desc = tegra_mc_error_names[type];
693+
desc = tegra20_mc_error_names[type];
694694

695695
switch (value & mc->soc->mc_err_status_type_mask) {
696696
case MC_ERR_STATUS_TYPE_INVALID_SMMU_PAGE:
@@ -758,9 +758,10 @@ const char *const tegra_mc_status_names[32] = {
758758
[16] = "MTS carveout violation",
759759
[17] = "Generalized carveout violation",
760760
[20] = "Route Sanity error",
761+
[21] = "GIC_MSI error",
761762
};
762763

763-
const char *const tegra_mc_error_names[8] = {
764+
const char *const tegra20_mc_error_names[8] = {
764765
[2] = "EMEM decode error",
765766
[3] = "TrustZone violation",
766767
[4] = "Carveout violation",

‎drivers/memory/tegra/mc.h‎

Lines changed: 71 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,7 @@
2525
#define MC_INT_DECERR_MTS BIT(16)
2626
#define MC_INT_DECERR_GENERALIZED_CARVEOUT BIT(17)
2727
#define MC_INT_DECERR_ROUTE_SANITY BIT(20)
28+
#define MC_INT_DECERR_ROUTE_SANITY_GIC_MSI BIT(21)
2829

2930
#define MC_INTMASK 0x04
3031
#define MC_GART_ERROR_REQ 0x30
@@ -76,13 +77,82 @@
7677
#define MC_ERR_STATUS_WRITABLE BIT(26)
7778
#define MC_ERR_STATUS_READABLE BIT(27)
7879

80+
#define MC_ERR_STATUS_GSC_ADR_HI_MASK 0xffff
81+
#define MC_ERR_STATUS_GSC_ADR_HI_SHIFT 16
82+
#define MC_ERR_STATUS_RT_ADR_HI_SHIFT 15
83+
7984
#define MC_ERR_STATUS_TYPE_SHIFT 28
8085
#define MC_ERR_STATUS_TYPE_INVALID_SMMU_PAGE (0x6 << 28)
86+
#define MC_ERR_STATUS_RT_TYPE_MASK (0xf << 28)
87+
#define MC_ERR_STATUS_RT_TYPE_SHIFT 28
8188

8289
#define MC_ERR_STATUS_ADR_HI_SHIFT 20
8390

8491
#define MC_BROADCAST_CHANNEL ~0
8592

93+
/* Tegra264 specific registers */
94+
95+
/* Registers for MSS HUB */
96+
#define MSS_HUB_GLOBAL_INTSTATUS_0 0x6000
97+
#define MSS_HUBC_INTR BIT(0)
98+
#define MSS_HUB_GLOBAL_MASK 0x7F00
99+
#define MSS_HUB_GLOBAL_SHIFT 8
100+
101+
#define MSS_HUB_HUBC_INTSTATUS_0 0x6008
102+
#define MSS_HUB_INTRSTATUS_0 0x600c
103+
#define MSS_HUB_HUBC_INTMASK_0 0x6010
104+
#define MSS_HUB_HUBC_SCRUB_DONE_INTMASK BIT(0)
105+
106+
#define MSS_HUB_HUBC_INTPRIORITY_0 0x6014
107+
#define MSS_HUB_INTRMASK_0 0x6018
108+
#define MSS_HUB_COALESCER_ERR_INTMASK BIT(0)
109+
#define MSS_HUB_SMMU_BYPASS_ALLOW_ERR_INTMASK BIT(1)
110+
#define MSS_HUB_ILLEGAL_TBUGRP_ID_INTMASK BIT(2)
111+
#define MSS_HUB_MSI_ERR_INTMASK BIT(3)
112+
#define MSS_HUB_POISON_RSP_INTMASK BIT(4)
113+
#define MSS_HUB_RESTRICTED_ACCESS_ERR_INTMASK BIT(5)
114+
#define MSS_HUB_RESERVED_PA_ERR_INTMASK BIT(6)
115+
116+
#define MSS_HUB_INTRPRIORITY_0 0x601c
117+
#define MSS_HUB_SMMU_BYPASS_ALLOW_ERR_STATUS_0 0x6020
118+
#define MSS_HUB_MSI_ERR_STATUS_0 0x6024
119+
#define MSS_HUB_POISON_RSP_STATUS_0 0x6028
120+
#define MSS_HUB_COALESCE_ERR_STATUS_0 0x60e0
121+
#define MSS_HUB_COALESCE_ERR_ADR_HI_0 0x60e4
122+
#define MSS_HUB_COALESCE_ERR_ADR_0 0x60e8
123+
#define MSS_HUB_RESTRICTED_ACCESS_ERR_STATUS_0 0x638c
124+
#define MSS_HUB_RESERVED_PA_ERR_STATUS_0 0x6390
125+
#define MSS_HUB_ILLEGAL_TBUGRP_ID_ERR_STATUS_0 0x63b0
126+
127+
/* Registers for channels */
128+
#define MC_CH_INTSTATUS_0 0x82d4
129+
#define MC_CH_INTMASK_0 0x82d8
130+
#define WCAM_ERR_INTMASK BIT(19)
131+
132+
#define MC_ERR_GENERALIZED_CARVEOUT_STATUS_1_0 0xbc74
133+
134+
/* Registers for MCF */
135+
#define MCF_COMMON_INTSTATUS0_0_0 0xce04
136+
#define MCF_INTSTATUS_0 0xce2c
137+
#define MCF_INTMASK_0 0xce30
138+
#define MCF_INTPRIORITY_0 0xce34
139+
140+
/* Registers for SBS */
141+
#define MSS_SBS_INTSTATUS_0 0xec08
142+
#define MSS_SBS_INTMASK_0 0xec0c
143+
#define MSS_SBS_FILL_FIFO_ISO_OVERFLOW_INTMASK BIT(0)
144+
#define MSS_SBS_FILL_FIFO_SISO_OVERFLOW_INTMASK BIT(1)
145+
#define MSS_SBS_FILL_FIFO_NISO_OVERFLOW_INTMASK BIT(2)
146+
147+
/* Bit field of MC_ERR_ROUTE_SANITY_STATUS_0 register */
148+
#define MC_ERR_ROUTE_SANITY_RW BIT(12)
149+
#define MC_ERR_ROUTE_SANITY_SEC BIT(13)
150+
151+
#define ERR_GENERALIZED_APERTURE_ID_SHIFT 0
152+
#define ERR_GENERALIZED_APERTURE_ID_MASK 0x1F
153+
#define ERR_GENERALIZED_CARVEOUT_APERTURE_ID_SHIFT 5
154+
#define ERR_GENERALIZED_CARVEOUT_APERTURE_ID_MASK 0x1F
155+
86156
static inline u32 tegra_mc_scale_percents(u64 val, unsigned int percents)
87157
{
88158
val = val * percents;
@@ -193,7 +263,7 @@ extern const struct tegra_mc_ops tegra186_mc_ops;
193263
irqreturn_t tegra30_mc_handle_irq(int irq, void *data);
194264
extern const irq_handler_t tegra30_mc_irq_handlers[1];
195265
extern const char * const tegra_mc_status_names[32];
196-
extern const char * const tegra_mc_error_names[8];
266+
extern const char * const tegra20_mc_error_names[8];
197267

198268
/*
199269
* These IDs are for internal use of Tegra ICC drivers. The ID numbers are

‎drivers/memory/tegra/tegra20.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -713,7 +713,7 @@ static irqreturn_t tegra20_mc_handle_irq(int irq, void *data)
713713
value = mc_readl(mc, reg);
714714

715715
id = value & mc->soc->client_id_mask;
716-
desc = tegra_mc_error_names[2];
716+
desc = tegra20_mc_error_names[2];
717717

718718
if (value & BIT(31))
719719
direction = "write";
@@ -724,7 +724,7 @@ static irqreturn_t tegra20_mc_handle_irq(int irq, void *data)
724724
value = mc_readl(mc, reg);
725725

726726
id = (value >> 1) & mc->soc->client_id_mask;
727-
desc = tegra_mc_error_names[2];
727+
desc = tegra20_mc_error_names[2];
728728

729729
if (value & BIT(0))
730730
direction = "write";
@@ -736,7 +736,7 @@ static irqreturn_t tegra20_mc_handle_irq(int irq, void *data)
736736

737737
id = value & mc->soc->client_id_mask;
738738
type = (value & BIT(30)) ? 4 : 3;
739-
desc = tegra_mc_error_names[type];
739+
desc = tegra20_mc_error_names[type];
740740
secure = "secure ";
741741

742742
if (value & BIT(31))

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