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i.MX ARM device tree changes for 7.1: - Device Tree Schema Compliance Fixes Fixed numerous CHECK_DTBS warnings across multiple i.MX SoC families Renamed nodes to match schema requirements (tcq→touchscreen, uart8250→serial, iomuxc→pinmux, etc.). Fixed node naming conventions (added "led-" prefix, proper addressing formats). Corrected compatible strings and removed undocumented fallbacks. Added required properties (clocks, clock-names, power supplies, #sound-dai-cells). - New Hardware Support Added DT overlays for various expansion modules (i.MX6 DHCOM PDK2, PicoITX display boards). Added support for muRata 1YN WiFi chip (replacement for 1DX) on i.MX6ULL DHCOR board. i.MX7ULP: Added CPU clock and OPP table support for frequency scaling. - Boot Phase Properties Added bootph.yaml properties to multiple TQ-Systems boards and SoCs: imx7s, tqma7, mba7 imx6ul/ull, tqma6ul/ull, mba6ulx imx6qdl, tqma6, mba6. - Bug Fixes & Corrections Fixed interrupt property usage (interrupts→interrupts-extended where needed). Corrected spelling ("TQ-Systems" with hyphen). Removed redundant intermediate nodes in pinmux hierarchy. Fixed clock references and naming. * tag 'imx-dt-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux: (43 commits) ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards ARM: dts: imx6sx: remove fallback compatible string fsl,imx28-lcdif ARM: dts: imx25: rename node name tcq to touchscreen ARM: dts: imx: b850v3: Disable unused usdhc4 ARM: dts: imx: b850v3: Define GPIO line names ARM: dts: imx: b850v3: Use alphabetical sorting ARM: dts: imx: bx50v3: Configure phy-mode to eliminate a warning ARM: dts: imx: bx50v3: Configure switch PHY max-speed to 100Mbps ARM: dts: imx7ulp: Add CPU clock and OPP table support ARM: dts: imx7-mba7: Deassert BOOT_EN after boot ARM: dts: tqma7: add boot phase properties ARM: dts: imx7s: add boot phase properties ARM: dts: tqma6ul[l]: correct spelling of TQ-Systems ARM: dts: mba6ulx: add boot phase properties ARM: dts: imx6ul[l]-tqma6ul[l]: add boot phase properties ARM: dts: imx6ul/imx6ull: add boot phase properties ARM: dts: imx6qdl-mba6: add boot phase properties ARM: dts: imx6qdl-tqma6: add boot phase properties ARM: dts: imx6qdl: add boot phase properties ARM: dts: imx6qdl-tqma6: add missing labels ... Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 parents 4177ec9 + 0037d16 commit 17ed8fd

89 files changed

Lines changed: 1607 additions & 1140 deletions

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‎arch/arm/boot/dts/nxp/imx/Makefile‎

Lines changed: 37 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,6 +58,31 @@ dtb-$(CONFIG_SOC_IMX53) += \
5858
imx53-voipac-bsb.dtb
5959
imx53-qsb-hdmi-dtbs := imx53-qsb.dtb imx53-qsb-hdmi.dtbo
6060
imx53-qsrb-hdmi-dtbs := imx53-qsrb.dtb imx53-qsb-hdmi.dtbo
61+
62+
imx6qdl-dhcom-pdk2-overlay-497-200-x12-dtbs := \
63+
imx6q-dhcom-pdk2.dtb \
64+
imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtbo
65+
66+
imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh-dtbs := \
67+
imx6q-dhcom-pdk2.dtb \
68+
imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo
69+
70+
imx6qdl-dhcom-pdk2-overlay-531-100-x21-dtbs := \
71+
imx6q-dhcom-pdk2.dtb \
72+
imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtbo
73+
74+
imx6qdl-dhcom-pdk2-overlay-531-100-x22-dtbs := \
75+
imx6q-dhcom-pdk2.dtb \
76+
imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtbo
77+
78+
imx6qdl-dhcom-pdk2-overlay-560-200-x12-dtbs := \
79+
imx6q-dhcom-pdk2.dtb \
80+
imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtbo
81+
82+
imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh-dtbs := \
83+
imx6q-dhcom-pdk2.dtb \
84+
imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo
85+
6186
dtb-$(CONFIG_SOC_IMX6Q) += \
6287
imx6dl-alti6p.dtb \
6388
imx6dl-apf6dev.dtb \
@@ -179,6 +204,18 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
179204
imx6q-cubox-i-som-v15.dtb \
180205
imx6q-dfi-fs700-m60.dtb \
181206
imx6q-dhcom-pdk2.dtb \
207+
imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtb \
208+
imx6qdl-dhcom-pdk2-overlay-497-200-x12.dtbo \
209+
imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtb \
210+
imx6qdl-dhcom-pdk2-overlay-505-200-x12-ch101olhlwh.dtbo \
211+
imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtb \
212+
imx6qdl-dhcom-pdk2-overlay-531-100-x21.dtbo \
213+
imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtb \
214+
imx6qdl-dhcom-pdk2-overlay-531-100-x22.dtbo \
215+
imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtb \
216+
imx6qdl-dhcom-pdk2-overlay-560-200-x12.dtbo \
217+
imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtb \
218+
imx6qdl-dhcom-picoitx-overlay-626-100-x2-ch101olhlwh.dtbo \
182219
imx6q-display5-tianma-tm070-1280x768.dtb \
183220
imx6q-dmo-edmqmx6.dtb \
184221
imx6q-dms-ba16.dtb \

‎arch/arm/boot/dts/nxp/imx/imx1-ads.dts‎

Lines changed: 53 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -76,60 +76,58 @@
7676
};
7777

7878
&iomuxc {
79-
imx1-ads {
80-
pinctrl_cspi1: cspi1grp {
81-
fsl,pins = <
82-
MX1_PAD_SPI1_MISO__SPI1_MISO 0x0
83-
MX1_PAD_SPI1_MOSI__SPI1_MOSI 0x0
84-
MX1_PAD_SPI1_RDY__SPI1_RDY 0x0
85-
MX1_PAD_SPI1_SCLK__SPI1_SCLK 0x0
86-
MX1_PAD_SPI1_SS__GPIO3_15 0x0
87-
>;
88-
};
89-
90-
pinctrl_i2c: i2cgrp {
91-
fsl,pins = <
92-
MX1_PAD_I2C_SCL__I2C_SCL 0x0
93-
MX1_PAD_I2C_SDA__I2C_SDA 0x0
94-
>;
95-
};
96-
97-
pinctrl_uart1: uart1grp {
98-
fsl,pins = <
99-
MX1_PAD_UART1_TXD__UART1_TXD 0x0
100-
MX1_PAD_UART1_RXD__UART1_RXD 0x0
101-
MX1_PAD_UART1_CTS__UART1_CTS 0x0
102-
MX1_PAD_UART1_RTS__UART1_RTS 0x0
103-
>;
104-
};
105-
106-
pinctrl_uart2: uart2grp {
107-
fsl,pins = <
108-
MX1_PAD_UART2_TXD__UART2_TXD 0x0
109-
MX1_PAD_UART2_RXD__UART2_RXD 0x0
110-
MX1_PAD_UART2_CTS__UART2_CTS 0x0
111-
MX1_PAD_UART2_RTS__UART2_RTS 0x0
112-
>;
113-
};
114-
115-
pinctrl_weim: weimgrp {
116-
fsl,pins = <
117-
MX1_PAD_A0__A0 0x0
118-
MX1_PAD_A16__A16 0x0
119-
MX1_PAD_A17__A17 0x0
120-
MX1_PAD_A18__A18 0x0
121-
MX1_PAD_A19__A19 0x0
122-
MX1_PAD_A20__A20 0x0
123-
MX1_PAD_A21__A21 0x0
124-
MX1_PAD_A22__A22 0x0
125-
MX1_PAD_A23__A23 0x0
126-
MX1_PAD_A24__A24 0x0
127-
MX1_PAD_BCLK__BCLK 0x0
128-
MX1_PAD_CS4__CS4 0x0
129-
MX1_PAD_DTACK__DTACK 0x0
130-
MX1_PAD_ECB__ECB 0x0
131-
MX1_PAD_LBA__LBA 0x0
132-
>;
133-
};
79+
pinctrl_cspi1: cspi1grp {
80+
fsl,pins = <
81+
MX1_PAD_SPI1_MISO__SPI1_MISO 0x0
82+
MX1_PAD_SPI1_MOSI__SPI1_MOSI 0x0
83+
MX1_PAD_SPI1_RDY__SPI1_RDY 0x0
84+
MX1_PAD_SPI1_SCLK__SPI1_SCLK 0x0
85+
MX1_PAD_SPI1_SS__GPIO3_15 0x0
86+
>;
87+
};
88+
89+
pinctrl_i2c: i2cgrp {
90+
fsl,pins = <
91+
MX1_PAD_I2C_SCL__I2C_SCL 0x0
92+
MX1_PAD_I2C_SDA__I2C_SDA 0x0
93+
>;
94+
};
95+
96+
pinctrl_uart1: uart1grp {
97+
fsl,pins = <
98+
MX1_PAD_UART1_TXD__UART1_TXD 0x0
99+
MX1_PAD_UART1_RXD__UART1_RXD 0x0
100+
MX1_PAD_UART1_CTS__UART1_CTS 0x0
101+
MX1_PAD_UART1_RTS__UART1_RTS 0x0
102+
>;
103+
};
104+
105+
pinctrl_uart2: uart2grp {
106+
fsl,pins = <
107+
MX1_PAD_UART2_TXD__UART2_TXD 0x0
108+
MX1_PAD_UART2_RXD__UART2_RXD 0x0
109+
MX1_PAD_UART2_CTS__UART2_CTS 0x0
110+
MX1_PAD_UART2_RTS__UART2_RTS 0x0
111+
>;
112+
};
113+
114+
pinctrl_weim: weimgrp {
115+
fsl,pins = <
116+
MX1_PAD_A0__A0 0x0
117+
MX1_PAD_A16__A16 0x0
118+
MX1_PAD_A17__A17 0x0
119+
MX1_PAD_A18__A18 0x0
120+
MX1_PAD_A19__A19 0x0
121+
MX1_PAD_A20__A20 0x0
122+
MX1_PAD_A21__A21 0x0
123+
MX1_PAD_A22__A22 0x0
124+
MX1_PAD_A23__A23 0x0
125+
MX1_PAD_A24__A24 0x0
126+
MX1_PAD_BCLK__BCLK 0x0
127+
MX1_PAD_CS4__CS4 0x0
128+
MX1_PAD_DTACK__DTACK 0x0
129+
MX1_PAD_ECB__ECB 0x0
130+
MX1_PAD_LBA__LBA 0x0
131+
>;
134132
};
135133
};

‎arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts‎

Lines changed: 45 additions & 47 deletions
Original file line numberDiff line numberDiff line change
@@ -67,56 +67,54 @@
6767
};
6868

6969
&iomuxc {
70-
imx1-apf9328 {
71-
pinctrl_eth: ethgrp {
72-
fsl,pins = <
73-
MX1_PAD_SIM_SVEN__GPIO2_14 0x0
74-
>;
75-
};
70+
pinctrl_eth: ethgrp {
71+
fsl,pins = <
72+
MX1_PAD_SIM_SVEN__GPIO2_14 0x0
73+
>;
74+
};
7675

77-
pinctrl_i2c: i2cgrp {
78-
fsl,pins = <
79-
MX1_PAD_I2C_SCL__I2C_SCL 0x0
80-
MX1_PAD_I2C_SDA__I2C_SDA 0x0
81-
>;
82-
};
76+
pinctrl_i2c: i2cgrp {
77+
fsl,pins = <
78+
MX1_PAD_I2C_SCL__I2C_SCL 0x0
79+
MX1_PAD_I2C_SDA__I2C_SDA 0x0
80+
>;
81+
};
8382

84-
pinctrl_uart1: uart1grp {
85-
fsl,pins = <
86-
MX1_PAD_UART1_TXD__UART1_TXD 0x0
87-
MX1_PAD_UART1_RXD__UART1_RXD 0x0
88-
MX1_PAD_UART1_CTS__UART1_CTS 0x0
89-
MX1_PAD_UART1_RTS__UART1_RTS 0x0
90-
>;
91-
};
83+
pinctrl_uart1: uart1grp {
84+
fsl,pins = <
85+
MX1_PAD_UART1_TXD__UART1_TXD 0x0
86+
MX1_PAD_UART1_RXD__UART1_RXD 0x0
87+
MX1_PAD_UART1_CTS__UART1_CTS 0x0
88+
MX1_PAD_UART1_RTS__UART1_RTS 0x0
89+
>;
90+
};
9291

93-
pinctrl_uart2: uart2grp {
94-
fsl,pins = <
95-
MX1_PAD_UART2_TXD__UART2_TXD 0x0
96-
MX1_PAD_UART2_RXD__UART2_RXD 0x0
97-
MX1_PAD_UART2_CTS__UART2_CTS 0x0
98-
MX1_PAD_UART2_RTS__UART2_RTS 0x0
99-
>;
100-
};
92+
pinctrl_uart2: uart2grp {
93+
fsl,pins = <
94+
MX1_PAD_UART2_TXD__UART2_TXD 0x0
95+
MX1_PAD_UART2_RXD__UART2_RXD 0x0
96+
MX1_PAD_UART2_CTS__UART2_CTS 0x0
97+
MX1_PAD_UART2_RTS__UART2_RTS 0x0
98+
>;
99+
};
101100

102-
pinctrl_weim: weimgrp {
103-
fsl,pins = <
104-
MX1_PAD_A0__A0 0x0
105-
MX1_PAD_A16__A16 0x0
106-
MX1_PAD_A17__A17 0x0
107-
MX1_PAD_A18__A18 0x0
108-
MX1_PAD_A19__A19 0x0
109-
MX1_PAD_A20__A20 0x0
110-
MX1_PAD_A21__A21 0x0
111-
MX1_PAD_A22__A22 0x0
112-
MX1_PAD_A23__A23 0x0
113-
MX1_PAD_A24__A24 0x0
114-
MX1_PAD_BCLK__BCLK 0x0
115-
MX1_PAD_CS4__CS4 0x0
116-
MX1_PAD_DTACK__DTACK 0x0
117-
MX1_PAD_ECB__ECB 0x0
118-
MX1_PAD_LBA__LBA 0x0
119-
>;
120-
};
101+
pinctrl_weim: weimgrp {
102+
fsl,pins = <
103+
MX1_PAD_A0__A0 0x0
104+
MX1_PAD_A16__A16 0x0
105+
MX1_PAD_A17__A17 0x0
106+
MX1_PAD_A18__A18 0x0
107+
MX1_PAD_A19__A19 0x0
108+
MX1_PAD_A20__A20 0x0
109+
MX1_PAD_A21__A21 0x0
110+
MX1_PAD_A22__A22 0x0
111+
MX1_PAD_A23__A23 0x0
112+
MX1_PAD_A24__A24 0x0
113+
MX1_PAD_BCLK__BCLK 0x0
114+
MX1_PAD_CS4__CS4 0x0
115+
MX1_PAD_DTACK__DTACK 0x0
116+
MX1_PAD_ECB__ECB 0x0
117+
MX1_PAD_LBA__LBA 0x0
118+
>;
121119
};
122120
};

‎arch/arm/boot/dts/nxp/imx/imx1.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,7 @@
202202
#clock-cells = <1>;
203203
};
204204

205-
iomuxc: iomuxc@21c000 {
205+
iomuxc: pinmux@21c000 {
206206
compatible = "fsl,imx1-iomuxc";
207207
reg = <0x0021c000 0x1000>;
208208
#address-cells = <1>;

‎arch/arm/boot/dts/nxp/imx/imx25-eukrea-cpuimx25.dtsi‎

Lines changed: 18 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -34,27 +34,25 @@
3434
};
3535

3636
&iomuxc {
37-
imx25-eukrea-cpuimx25 {
38-
pinctrl_fec: fecgrp {
39-
fsl,pins = <
40-
MX25_PAD_FEC_MDC__FEC_MDC 0x80000000
41-
MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0
42-
MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
43-
MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
44-
MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
45-
MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
46-
MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000
47-
MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
48-
MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0
49-
>;
50-
};
37+
pinctrl_fec: fecgrp {
38+
fsl,pins = <
39+
MX25_PAD_FEC_MDC__FEC_MDC 0x80000000
40+
MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0
41+
MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000
42+
MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000
43+
MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
44+
MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000
45+
MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000
46+
MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000
47+
MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0
48+
>;
49+
};
5150

52-
pinctrl_i2c1: i2c1grp {
53-
fsl,pins = <
54-
MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000
55-
MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000
56-
>;
57-
};
51+
pinctrl_i2c1: i2c1grp {
52+
fsl,pins = <
53+
MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000
54+
MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000
55+
>;
5856
};
5957
};
6058

‎arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -43,10 +43,8 @@
4343
};
4444

4545
&iomuxc {
46-
imx25-eukrea-mbimxsd25-baseboard-cmo-qvga {
47-
pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
48-
fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
49-
};
46+
pinctrl_reg_lcd_3v3: reg_lcd_3v3grp {
47+
fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
5048
};
5149
};
5250

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