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Merge tag 'v7.1-rockchip-dts32-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
Support for the RV1103B SoC and the Onion Omega4 board using it. While the RV1103B only got a B-extension to its name, the SoC internals were reworked heavily. So likely it's mainly pin compatible to the non-B variant. The dt-binding for the RV1103B clock driver is shared with the clock- driver branch going into the clock-tree. * tag 'v7.1-rockchip-dts32-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Add Onion Omega4 Evaluation Board dt-bindings: arm: rockchip: Add Omega4 Evaluation board ARM: dts: rockchip: Add support for RV1103B dt-bindings: soc: rockchip: grf: Add RV1103B compatibles dt-bindings: clock: rockchip: Add RV1103B CRU support Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2 parents 104f1e3 + 683192d commit 4177ec9

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‎Documentation/devicetree/bindings/arm/rockchip.yaml‎

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- const: netxeon,r89
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- const: rockchip,rk3288
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- description: Onion Omega4 Evaluation board
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items:
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- const: onion,omega4-evb
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- const: onion,omega4
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- const: rockchip,rv1103b
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- description: OPEN AI LAB EAIDK-610
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items:
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- const: openailab,eaidk-610

‎Documentation/devicetree/bindings/clock/rockchip,rv1126b-cru.yaml‎

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properties:
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compatible:
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enum:
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- rockchip,rv1103b-cru
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- rockchip,rv1126b-cru
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reg:

‎Documentation/devicetree/bindings/soc/rockchip/grf.yaml‎

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- rockchip,rk3588-vo0-grf
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- rockchip,rk3588-vo1-grf
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- rockchip,rk3588-vop-grf
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- rockchip,rv1103b-ioc
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- rockchip,rv1108-usbgrf
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- const: syscon
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- items:
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- rockchip,rk3576-pmu0-grf
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- rockchip,rk3576-usb2phy-grf
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- rockchip,rk3588-usb2phy-grf
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- rockchip,rv1103b-pmu-grf
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- rockchip,rv1108-grf
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- rockchip,rv1108-pmugrf
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- rockchip,rv1126-grf
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- rockchip,rk3036-grf
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- rockchip,rk3308-grf
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- rockchip,rk3368-pmugrf
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- rockchip,rv1103b-pmu-grf
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then:
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properties:

‎arch/arm/boot/dts/rockchip/Makefile‎

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# SPDX-License-Identifier: GPL-2.0
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dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1103b-omega4-evb.dtb \
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rv1108-elgin-r1.dtb \
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rv1108-evb.dtb \
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rv1109-relfor-saib.dtb \

‎arch/arm/boot/dts/rockchip/rv1103b-omega4-evb.dts‎

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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* Copyright (c) 2025 plan44.ch/luz
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* Copyright (c) 2026 Onion Corporation
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include "rv1103b-omega4.dtsi"
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/ {
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model = "Onion Omega4 Evaluation Board";
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compatible = "onion,omega4-evb", "onion,omega4", "rockchip,rv1103b";
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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leds {
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compatible = "gpio-leds";
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led-0 {
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color = <LED_COLOR_ID_BLUE>;
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default-state = "on";
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function = LED_FUNCTION_STATUS;
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gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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label = "sys";
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pinctrl-names = "default";
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pinctrl-0 = <&led>;
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};
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};
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};
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&fspi0 {
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status = "okay";
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};
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&pinctrl {
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leds {
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led: led {
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rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdmmc0 {
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status = "okay";
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};
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&sdmmc1 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};

‎arch/arm/boot/dts/rockchip/rv1103b-omega4.dtsi‎

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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* Copyright (c) 2025 plan44.ch/luz
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* Copyright (c) 2026 Onion Corporation
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*/
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/dts-v1/;
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#include "rv1103b.dtsi"
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/ {
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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post-power-on-delay-ms = <300>;
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reset-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
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};
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vcc3v3_sd: vcc3v3-sd {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwren>;
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regulator-name = "vcc3v3_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vccio_sd: vccio-sd {
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compatible = "regulator-gpio";
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gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_volt>;
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regulator-name = "vccio_sd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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states = <3300000 1 1800000 0>;
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};
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};
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&uart0 {
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bootph-all;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0m0_xfer>;
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};
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&fspi0 {
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spi_nand: flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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bootph-pre-ram;
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bootph-some-ram;
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spi-max-frequency = <75000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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reg = <0x00000000 0x00040000>;
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label = "env";
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};
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partition@40000 {
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reg = <0x00040000 0x00100000>;
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label = "idblock";
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read-only;
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};
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partition@140000 {
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reg = <0x00140000 0x00100000>;
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label = "uboot";
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read-only;
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};
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partition@240000 {
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reg = <0x00240000 0x00800000>;
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label = "boot";
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};
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partition@a40000 {
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reg = <0x00a40000 0x0f5c0000>;
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label = "ubi";
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};
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};
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};
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};
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&sdmmc0 {
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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no-sdio;
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no-mmc;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc3v3_sd>;
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vqmmc-supply = <&vccio_sd>;
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status = "disabled";
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};
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&sdmmc1 {
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bus-width = <4>;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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no-sd;
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no-mmc;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1_cmd &sdmmc1_clk &sdmmc1_bus4>;
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status = "disabled";
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};
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&pinctrl {
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sdio-pwrseq {
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/omit-if-no-ref/
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wifi_enable_h: wifi-enable-h {
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rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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/omit-if-no-ref/
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sdmmc_pwren: sdmmc-pwren {
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rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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sdmmc_volt: sdmmc-volt {
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rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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wireless-wlan {
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/omit-if-no-ref/
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wifi_host_wake_irq: wifi-host-wake-irq {
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rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};

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