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Add f64 <-> i64/u64 conversions #310

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482faea
Implement f64<->i64/u64 conversions, with native instructions on NEON…
Shnatsel Aug 5, 2026
f0faf1e
Refactor x86 handle_cvt to use one toplevel match
Shnatsel Aug 5, 2026
22f9738
Further refactoring of handle_cvt
Shnatsel Aug 5, 2026
39adc0e
Optimize AVX-512 Float->Unsigned conversion
Shnatsel Aug 5, 2026
451f8ee
Replace qualified paths for ScalarType with use to make the match mor…
Shnatsel Aug 5, 2026
3309d08
Consolidate AVX-512 paths in the generator between 32-bit and 64-bit …
Shnatsel Aug 5, 2026
70c3211
Add comments to explain what the hell is happening in handle_cvt
Shnatsel Aug 5, 2026
308f17c
Merge branch 'main' into 64-bit-conversions
Shnatsel Aug 5, 2026
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120 changes: 120 additions & 0 deletions fearless_simd/src/generated/avx2.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -4905,6 +4905,22 @@ impl Simd for Avx2 {
kernel(self, vectors, dest);
}
#[inline(always)]
fn cvt_u64_f64x2(self, a: f64x2<Self>) -> u64x2<Self> {
[a[0usize] as u64, a[1usize] as u64].simd_into(self)
}
#[inline(always)]
fn cvt_u64_precise_f64x2(self, a: f64x2<Self>) -> u64x2<Self> {
[a[0usize] as u64, a[1usize] as u64].simd_into(self)
}
#[inline(always)]
fn cvt_i64_f64x2(self, a: f64x2<Self>) -> i64x2<Self> {
[a[0usize] as i64, a[1usize] as i64].simd_into(self)
}
#[inline(always)]
fn cvt_i64_precise_f64x2(self, a: f64x2<Self>) -> i64x2<Self> {
[a[0usize] as i64, a[1usize] as i64].simd_into(self)
}
#[inline(always)]
fn splat_i64x2(self, val: i64) -> i64x2<Self> {
crate::kernel!(
#[inline(always)]
Expand Down Expand Up @@ -5340,6 +5356,10 @@ impl Simd for Avx2 {
kernel(self, vectors, dest);
}
#[inline(always)]
fn cvt_f64_i64x2(self, a: i64x2<Self>) -> f64x2<Self> {
[a[0usize] as f64, a[1usize] as f64].simd_into(self)
}
#[inline(always)]
fn splat_u64x2(self, val: u64) -> u64x2<Self> {
crate::kernel!(
#[inline(always)]
Expand Down Expand Up @@ -5762,6 +5782,10 @@ impl Simd for Avx2 {
kernel(self, vectors, dest);
}
#[inline(always)]
fn cvt_f64_u64x2(self, a: u64x2<Self>) -> f64x2<Self> {
[a[0usize] as f64, a[1usize] as f64].simd_into(self)
}
#[inline(always)]
fn splat_mask64x2(self, val: bool) -> mask64x2<Self> {
crate::kernel!(
#[inline(always)]
Expand Down Expand Up @@ -11153,6 +11177,46 @@ impl Simd for Avx2 {
kernel(self, a)
}
#[inline(always)]
fn cvt_u64_f64x4(self, a: f64x4<Self>) -> u64x4<Self> {
[
a[0usize] as u64,
a[1usize] as u64,
a[2usize] as u64,
a[3usize] as u64,
]
.simd_into(self)
}
#[inline(always)]
fn cvt_u64_precise_f64x4(self, a: f64x4<Self>) -> u64x4<Self> {
[
a[0usize] as u64,
a[1usize] as u64,
a[2usize] as u64,
a[3usize] as u64,
]
.simd_into(self)
}
#[inline(always)]
fn cvt_i64_f64x4(self, a: f64x4<Self>) -> i64x4<Self> {
[
a[0usize] as i64,
a[1usize] as i64,
a[2usize] as i64,
a[3usize] as i64,
]
.simd_into(self)
}
#[inline(always)]
fn cvt_i64_precise_f64x4(self, a: f64x4<Self>) -> i64x4<Self> {
[
a[0usize] as i64,
a[1usize] as i64,
a[2usize] as i64,
a[3usize] as i64,
]
.simd_into(self)
}
#[inline(always)]
fn splat_i64x4(self, val: i64) -> i64x4<Self> {
crate::kernel!(
#[inline(always)]
Expand Down Expand Up @@ -11613,6 +11677,16 @@ impl Simd for Avx2 {
kernel(self, a)
}
#[inline(always)]
fn cvt_f64_i64x4(self, a: i64x4<Self>) -> f64x4<Self> {
[
a[0usize] as f64,
a[1usize] as f64,
a[2usize] as f64,
a[3usize] as f64,
]
.simd_into(self)
}
#[inline(always)]
fn splat_u64x4(self, val: u64) -> u64x4<Self> {
crate::kernel!(
#[inline(always)]
Expand Down Expand Up @@ -12057,6 +12131,16 @@ impl Simd for Avx2 {
kernel(self, a)
}
#[inline(always)]
fn cvt_f64_u64x4(self, a: u64x4<Self>) -> f64x4<Self> {
[
a[0usize] as f64,
a[1usize] as f64,
a[2usize] as f64,
a[3usize] as f64,
]
.simd_into(self)
}
#[inline(always)]
fn splat_mask64x4(self, val: bool) -> mask64x4<Self> {
crate::kernel!(
#[inline(always)]
Expand Down Expand Up @@ -16098,6 +16182,32 @@ impl Simd for Avx2 {
)
}
#[inline(always)]
fn cvt_u64_f64x8(self, a: f64x8<Self>) -> u64x8<Self> {
let (a0, a1) = self.split_f64x8(a);
self.combine_u64x4(self.cvt_u64_f64x4(a0), self.cvt_u64_f64x4(a1))
}
#[inline(always)]
fn cvt_u64_precise_f64x8(self, a: f64x8<Self>) -> u64x8<Self> {
let (a0, a1) = self.split_f64x8(a);
self.combine_u64x4(
self.cvt_u64_precise_f64x4(a0),
self.cvt_u64_precise_f64x4(a1),
)
}
#[inline(always)]
fn cvt_i64_f64x8(self, a: f64x8<Self>) -> i64x8<Self> {
let (a0, a1) = self.split_f64x8(a);
self.combine_i64x4(self.cvt_i64_f64x4(a0), self.cvt_i64_f64x4(a1))
}
#[inline(always)]
fn cvt_i64_precise_f64x8(self, a: f64x8<Self>) -> i64x8<Self> {
let (a0, a1) = self.split_f64x8(a);
self.combine_i64x4(
self.cvt_i64_precise_f64x4(a0),
self.cvt_i64_precise_f64x4(a1),
)
}
#[inline(always)]
fn splat_i64x8(self, val: i64) -> i64x8<Self> {
let half = self.splat_i64x4(val);
self.combine_i64x4(half, half)
Expand Down Expand Up @@ -16420,6 +16530,11 @@ impl Simd for Avx2 {
self.combine_i64x4(self.neg_i64x4(a0), self.neg_i64x4(a1))
}
#[inline(always)]
fn cvt_f64_i64x8(self, a: i64x8<Self>) -> f64x8<Self> {
let (a0, a1) = self.split_i64x8(a);
self.combine_f64x4(self.cvt_f64_i64x4(a0), self.cvt_f64_i64x4(a1))
}
#[inline(always)]
fn splat_u64x8(self, val: u64) -> u64x8<Self> {
let half = self.splat_u64x4(val);
self.combine_u64x4(half, half)
Expand Down Expand Up @@ -16737,6 +16852,11 @@ impl Simd for Avx2 {
)
}
#[inline(always)]
fn cvt_f64_u64x8(self, a: u64x8<Self>) -> f64x8<Self> {
let (a0, a1) = self.split_u64x8(a);
self.combine_f64x4(self.cvt_f64_u64x4(a0), self.cvt_f64_u64x4(a1))
}
#[inline(always)]
fn splat_mask64x8(self, val: bool) -> mask64x8<Self> {
let half = self.splat_mask64x4(val);
self.combine_mask64x4(half, half)
Expand Down
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