Add Jinja2 forward kernel templates for nobag unweighted embedding#82
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aagalleg wants to merge 33 commits into
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Add Jinja2 forward kernel templates for nobag unweighted embedding#82aagalleg wants to merge 33 commits into
aagalleg wants to merge 33 commits into
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Remove .gitkeep placeholders
- Add invert_permute kernel to CMake build - Implement invert_permute Python wrapper in ops.py - Register invert_permute operator with schema existence check - Add torch_library.h utility for schema validation
Add SYCL/XPU kernel implementation for invert_permute operation.
Add complete test coverage for invert_permute operator on XPU devices, covering correctness, validation, parity, and performance. Test coverage includes: - Correctness tests for int32/int64 with edge cases (empty, single element, identity, reverse, random permutations) - Input validation tests for invalid dimensions and dtypes - Meta function tests for torch.compile compatibility - PyTorch opcheck validation for operator conventions - Parametric tests with varying sizes (1 to 1M elements) - CPU-XPU parity tests to ensure consistent results - Performance benchmarks measuring execution time and bandwidth
- CMakeLists: add permute_1d_sparse_data.cpp to build sources - ops.py: add Python wrapper with type hints - ops_registry.cpp: register operator schema in fbgemm namespace
Implement SYCL/XPU kernel implementation of permute_1D_sparse_data operator for sparse jagged/1D format data permutation.
Add SYCL port of FBGEMM's asynchronous_complete_cumsum operator for Intel XPU devices. The operator computes a complete cumulative sum with a leading zero (e.g., [a, b, c] → [0, a, a+b, a+b+c]).
Integrate asynchronous_complete_cumsum operator into fbgemm-xpu: - Add Python wrapper with complete cumsum documentation - Register operator schema in torch library - Include implementation in CMake build
Add comprehensive test suite for asynchronous_complete_cumsum operator covering: - Basic functionality with int32 and int64 dtypes - Empty tensor handling - Random input validation with numpy reference
Add SYCL infrastructure headers from intel/torch-xpu-ops/ to support advanced kernel implementations: - DeviceProperties.h: Device capability queries and work group sizing - SYCLContext.h: SYCL context management and namespace aliases - SYCLHelpers.h: SYCL kernel submission and utility functions - TensorInfo.h: Tensor metadata and dimension handling structures - TensorOptions.h: Tensor configuration and options management - Runtime.h: SYCL runtime utilities - Macros.h: Common macro definitions - Scalar.h: Scalar type conversion utilities These headers provide the foundation for implementing 2D sparse data permutation and other complex SYCL operations on XPU devices.
Add foundational utility headers and implementations to support complex SYCL kernel operations: - utils.h/cpp: Core constants, type definitions, kernel launch helpers, and device property queries - dispatch_macros.h: Type dispatch macros for handling multiple data types (int32, int64, float, etc.) - tensor_utils.h: Tensor manipulation and metadata utilities - function_types.h: Symbol visibility definitions for shared library exports These utilities provide essential infrastructure for implementing 2D sparse data permutation and other advanced operators on XPU devices, including work group sizing, kernel launch helpers, and type-safe dispatching mechanisms.
Add SYCL port of FBGEMM's permute_2D_sparse_data operator for Intel XPU devices. This operator permutes 2D sparse data including lengths [T, B], indices, and optional weights according to a permutation vector, commonly used for reordering embedding table features. Implementation includes: - SYCL kernels: permute_2D_lengths_kernel and permute_2D_data_kernel - Host function: permute_2D_sparse_data_xpu
Integrate permute_2D_sparse_data operator into fbgemm-xpu: - Add Python wrapper with type hints and documentation - Register operator schema in torch library - Include implementation files in CMake build (utils.cpp, SYCL kernels, and operator implementation)
Add comprehensive test suite for permute_2D_sparse_data operator covering: - Basic functionality with int32 and int64 data types - Sparse data with and without weights - Permutations with repeated indices - Exact value validation - CPU-XPU consistency verification
Fixes CMake configuration and import ordering to properly build and load the block_bucketize_sparse_features XPU operator. - Configure CMake for XPU-only PyTorch builds - Import torch before _C extension to load libtorch.so dependencies - Adjust test imports for consistency All 18 tests passing.
… generation Add jinja_environment.py module to support template-based code generation for FBGEMM-XPU kernels.
Add common.py module with CodeTemplate class that provides functionality for loading Jinja2 templates, rendering them with context variables, and writing generated files with appropriate headers.
Add torch_type_utils.py module with utilities for handling PyTorch data types in template-based code generation.
Add generate_forward_split.py and generate_backward_split.py scripts for generating SYCL embedding kernels from Jinja2 templates.
Add backward_utils.cpp and backward_utils.h with SYCL ports of FBGEMM backward pass utilities for embedding operations.
…mization Add vec4.h header implementing 4-element vectorized data structures for efficient memory access in embedding operations.
Add feature_gates module to enable/disable features at runtime via environment variables.
Add pt2_arg_utils.h header defining argument index enumerations for PyTorch 2 compiled embedding operations.
Add split_embeddings_cache_xpu.h header defining indices for UVM (Unified Virtual Memory) cache performance statistics.
…version Add stochastic_rounding.h header implementing stochastic rounding algorithms for float-to-half precision conversions in embedding operations.
Add weight_row.h header implementing abstractions for efficient access to embedding table weight rows with support for both direct table access and cache-resident data.
Add Jinja2 template for generating optimized SYCL forward kernels for small embedding dimensions (D <= 32).
Add embedding_forward_split_kernel_template.h as a Jinja2 template for generating the main SYCL forward kernel for no-bag (sequence) embeddings.
Add embedding_forward_nobag_unweighted_host_template.cpp as a Jinja2 template for generating the host-side dispatch function for no-bag (sequence) embedding forward passes.
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This PR adds the three Jinja2 templates that generate the SYCL forward
pass kernels for no-bag (sequence) unweighted embedding lookups on Intel
XPU devices. A single template set generates both the dense and split
variants at code-generation time via the
generate_forward_split.pyscript.
Depends on #81
Changes
Forward Kernel Templates (
src/codegen/training/forward/)embedding_forward_split_kernel_nobag_small_template.h: Jinja2template for the small-dimension forward kernel optimized for
D <= 32. Generates{Dense|Split}EmbeddingNobagCodegenForwardUnweightedSmallKernel,a SYCL
nd_item<2>kernel that uses sub-group shuffle(
select_from_group) for cooperative index loading andWeightRowAccessorwithVec4Tfor vectorized weight reads.Supports DEVICE, MANAGED, and MANAGED_CACHING placements for the
split variant
embedding_forward_split_kernel_template.h: Jinja2 template forthe general forward kernel for
D > 32. Generates{Dense|Split}EmbeddingNobagCodegenForwardUnweightedKernel, a tilednd_item<2>kernel iterating over embedding dimensions in strides ofkThreadGroupSize × VEC_WIDTH. The split variant adds an optionaluse_lxu_cachetemplate parameter for cache-aware weight fetching vialxu_cache_weightsembedding_forward_nobag_unweighted_host_template.cpp: Jinja2template for the host-side dispatch function. Generates
{dense|split}_embedding_nobag_forward_unweighted_xpu, which:emb_t,cache_t,output_t,and
index_tD <= 32) viaDISPATCH_OPTIMAL_NOBAG_FORWARD_KERNELor falls back to the generalkernel
use_lxu_cache=true/falsedepending on whether
lxu_cache_weightsis populatedTORCH_LIBRARY_IMPLunderthe XPU dispatch key
cc: @flezaalv