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Add Jinja2 code generation infrastructure for SYCL embedding kernels#80

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aagalleg wants to merge 23 commits into
intel:mainfrom
aagalleg:feat/add_generator_scripts
Draft

Add Jinja2 code generation infrastructure for SYCL embedding kernels#80
aagalleg wants to merge 23 commits into
intel:mainfrom
aagalleg:feat/add_generator_scripts

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@aagalleg

@aagalleg aagalleg commented Jul 3, 2026

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This PR introduces the Python-based code generation infrastructure
(genscript/) used to produce SYCL forward and backward embedding
kernel source files from Jinja2 templates. This is the first step
toward a fully automated build pipeline for the XPU training kernels.

Depends on #76

Changes

Code Generation Framework (src/codegen/genscript/)

  • jinja_environment.py: Instantiates the Jinja2 environment
    pointing to the template root, registers global variables
    (max_embedding_dim, items_per_warp, fixed_max_vecs_per_thread),
    and provides helper functions for kernel dispatch code generation
    including get_max_vecs_template_configs,
    dispatch_non_vec_blocking_kernel, dispatch_vec_blocking_kernel,
    and dispatch_optimal_kernel

  • common.py: CodeTemplate class that wraps Jinja2 template
    loading and rendering. Adds auto-generated file headers (with
    __TEMPLATE_SOURCE_FILE__ macro / variable) and writes rendered
    output to the configured install directory

  • torch_type_utils.py: ArgType enum and TensorType dataclass
    for mapping between PyTorch argument types and their C++
    primitive/scalar type representations

  • scripts_argsparse.py: Shared argparse configuration for all
    generation scripts — exposes --install_dir, --opensource, and
    --is_rocm flags

  • generate_forward_split.py: Generates dense and split forward
    kernel variants (host dispatch, SYCL small kernel header, PT2
    wrapper)

  • generate_backward_split.py: Generates dense and rowwise-Adagrad
    backward kernel variants (warp-per-row and CTA-per-row headers, host
    dispatch) for both the dense gradient accumulation and split optimizer
    paths

cc: @flezaalv

aagalleg and others added 23 commits June 18, 2026 22:37
- Add invert_permute kernel to CMake build
- Implement invert_permute Python wrapper in ops.py
- Register invert_permute operator with schema existence check
- Add torch_library.h utility for schema validation
Add SYCL/XPU kernel implementation for invert_permute operation.
Add complete test coverage for invert_permute operator on XPU
devices, covering correctness, validation, parity, and performance.

Test coverage includes:
- Correctness tests for int32/int64 with edge cases (empty, single
  element, identity, reverse, random permutations)
- Input validation tests for invalid dimensions and dtypes
- Meta function tests for torch.compile compatibility
- PyTorch opcheck validation for operator conventions
- Parametric tests with varying sizes (1 to 1M elements)
- CPU-XPU parity tests to ensure consistent results
- Performance benchmarks measuring execution time and bandwidth
- CMakeLists: add permute_1d_sparse_data.cpp to build sources
- ops.py: add Python wrapper with type hints
- ops_registry.cpp: register operator schema in fbgemm namespace
Implement SYCL/XPU kernel implementation of permute_1D_sparse_data
operator for sparse jagged/1D format data permutation.
Add SYCL port of FBGEMM's asynchronous_complete_cumsum operator for
Intel XPU devices. The operator computes a complete cumulative sum
with a leading zero (e.g., [a, b, c] → [0, a, a+b, a+b+c]).
Integrate asynchronous_complete_cumsum operator into fbgemm-xpu:
- Add Python wrapper with complete cumsum documentation
- Register operator schema in torch library
- Include implementation in CMake build
Add comprehensive test suite for asynchronous_complete_cumsum
operator covering:
- Basic functionality with int32 and int64 dtypes
- Empty tensor handling
- Random input validation with numpy reference
Add SYCL infrastructure headers from intel/torch-xpu-ops/
to support advanced kernel implementations:
- DeviceProperties.h: Device capability queries and work group sizing
- SYCLContext.h: SYCL context management and namespace aliases
- SYCLHelpers.h: SYCL kernel submission and utility functions
- TensorInfo.h: Tensor metadata and dimension handling structures
- TensorOptions.h: Tensor configuration and options management
- Runtime.h: SYCL runtime utilities
- Macros.h: Common macro definitions
- Scalar.h: Scalar type conversion utilities

These headers provide the foundation for implementing 2D sparse data
permutation and other complex SYCL operations on XPU devices.
Add foundational utility headers and implementations to support
complex SYCL kernel operations:
- utils.h/cpp: Core constants, type definitions, kernel launch
  helpers, and device property queries
- dispatch_macros.h: Type dispatch macros for handling multiple
  data types (int32, int64, float, etc.)
- tensor_utils.h: Tensor manipulation and metadata utilities
- function_types.h: Symbol visibility definitions for shared
  library exports

These utilities provide essential infrastructure for implementing
2D sparse data permutation and other advanced operators on XPU
devices, including work group sizing, kernel launch helpers, and
type-safe dispatching mechanisms.
Add SYCL port of FBGEMM's permute_2D_sparse_data operator for
Intel XPU devices. This operator permutes 2D sparse data including
lengths [T, B], indices, and optional weights according to a
permutation vector, commonly used for reordering embedding table
features.

Implementation includes:
- SYCL kernels: permute_2D_lengths_kernel and permute_2D_data_kernel
- Host function: permute_2D_sparse_data_xpu
Integrate permute_2D_sparse_data operator into fbgemm-xpu:
- Add Python wrapper with type hints and documentation
- Register operator schema in torch library
- Include implementation files in CMake build (utils.cpp, SYCL
  kernels, and operator implementation)
Add comprehensive test suite for permute_2D_sparse_data operator
covering:
- Basic functionality with int32 and int64 data types
- Sparse data with and without weights
- Permutations with repeated indices
- Exact value validation
- CPU-XPU consistency verification
Fixes CMake configuration and import ordering to properly build and load
the block_bucketize_sparse_features XPU operator.

- Configure CMake for XPU-only PyTorch builds
- Import torch before _C extension to load libtorch.so dependencies
- Adjust test imports for consistency

All 18 tests passing.
… generation

Add jinja_environment.py module to support template-based code
generation for FBGEMM-XPU kernels.
Add common.py module with CodeTemplate class that provides
functionality for loading Jinja2 templates, rendering them with
context variables, and writing generated files with appropriate
headers.
Add torch_type_utils.py module with utilities for handling PyTorch
data types in template-based code generation.
Add generate_forward_split.py and generate_backward_split.py scripts
for generating SYCL embedding kernels from Jinja2 templates.
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