CUDA: fuse RMS_NORM + SCALE into one kernel - #29393
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- ggml-org#28068 builds the GDN q/k l2norm as ggml_scale(ggml_rms_norm(x, eps/n), 1/sqrt(n)). This adds 2 SCALE nodes per GDN layer, 96 extra kernel launches per ubatch on Qwen3.8-27B (48 GDN layers). - The extra kernels take no measurable GPU time, but each launch has a host/driver cost. It is small with plain batch processing and about 10x larger with draft-mtp speculative decoding. - rms_norm_f32 gets a do_scale flag, the same pattern as do_multiply/do_add, so the fused path shares the kernel, the reduction and the launcher. It computes scale * (rsqrt(mean + eps) * x), which matches the unfused rms_norm + scale bit for bit, so ggml-org#28068 numerics are kept. - Fusion only fires when SCALE has no bias and the rms_norm output has a single consumer (ggml_can_fuse). - Metal (ggml-org#28948) and SYCL (ggml-org#28931) already fuse the same pattern. Measured on 2x GTX 1080 Ti (sm_61, PCIe 3.0 x16 + x4), i7-13700KF, Windows 11, driver 582.66, CUDA 12.9. Qwen3.8-27B-UD-Q4_K_XL, -ngl 99 -ts 53,47 -ot token_embd=CPU, master fee39dd. llama-bench -ub 128,512 -p 512,2048 -n 128 -r 5, tok/s: build pp512@128 pp2048@128 pp2048@512 tg128 master 367.7 419.1 385.4 12.90 master + fix 372.6 420.6 388.6 12.98 +1.3% +0.4% +0.8% +0.6% llama-server cold prefill, -c 56000 -ub 128 -b 2048, draft-mtp n-max 3 p-min 0.5, mean of 2 rounds x 3 reps: build pp 8000 pp 20000 master 356.5 322.0 master + fix 371.4 (+4.2%) 337.4 (+4.8%) - Launches per ubatch go from 1032.9 + 841.7 back to 978.9 + 799.7 (CUDA0 + CUDA1), the b10828 count. The GPU op sum is unchanged. - test-backend-ops RMS_NORM_SCALE, NORM_SCALE, RMS_NORM_MUL_ADD, RMS_NORM_MUL_ROPE, RMS_NORM, RMS_NORM_BACK, NORM, L2_NORM and SCALE all pass on both GPUs. - Perplexity is identical to the unfused build: 3.2030 +/- 0.0559 at -c 2048, 16 chunks. - Draft acceptance counts per request match the unfused build. Assisted-by: Claude Opus 5.5
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- ggml-org#28068 builds the GDN q/k l2norm as ggml_scale(ggml_rms_norm(x, eps/n), 1/sqrt(n)). This adds 2 SCALE nodes per GDN layer, 96 extra kernel launches per ubatch on Qwen3.8-27B (48 GDN layers). - The extra kernels take no measurable GPU time, but each launch has a host/driver cost. It is small with plain batch processing and about 10x larger with draft-mtp speculative decoding. - rms_norm_f32 gets a do_scale flag, the same pattern as do_multiply/do_add, so the fused path shares the kernel, the reduction and the launcher. It computes scale * (rsqrt(mean + eps) * x), which matches the unfused rms_norm + scale bit for bit, so ggml-org#28068 numerics are kept. - Fusion only fires when SCALE has no bias and the rms_norm output has a single consumer (ggml_can_fuse). - Metal (ggml-org#28948) and SYCL (ggml-org#28931) already fuse the same pattern. Measured on 2x GTX 1080 Ti (sm_61, PCIe 3.0 x16 + x4), i7-13700KF, Windows 11, driver 582.66, CUDA 12.9. Qwen3.8-27B-UD-Q4_K_XL, -ngl 99 -ts 53,47 -ot token_embd=CPU, master fee39dd. llama-bench -ub 128,512 -p 512,2048 -n 128 -r 5, tok/s: build pp512@128 pp2048@128 pp2048@512 tg128 master 367.7 419.1 385.4 12.90 master + fix 372.6 420.6 388.6 12.98 +1.3% +0.4% +0.8% +0.6% llama-server cold prefill, -c 56000 -ub 128 -b 2048, draft-mtp n-max 3 p-min 0.5, mean of 2 rounds x 3 reps: build pp 8000 pp 20000 master 356.5 322.0 master + fix 371.4 (+4.2%) 337.4 (+4.8%) - Launches per ubatch go from 1032.9 + 841.7 back to 978.9 + 799.7 (CUDA0 + CUDA1), the b10828 count. The GPU op sum is unchanged. - test-backend-ops RMS_NORM_SCALE, NORM_SCALE, RMS_NORM_MUL_ADD, RMS_NORM_MUL_ROPE, RMS_NORM, RMS_NORM_BACK, NORM, L2_NORM and SCALE all pass on both GPUs. - Perplexity is identical to the unfused build: 3.2030 +/- 0.0559 at -c 2048, 16 chunks. - Draft acceptance counts per request match the unfused build. Assisted-by: Claude Opus 5.5
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Merge upstream commits: - llama: add llama_prec_policy + model-driven W4A4 path (ggml-org#24364) - llama: fix tensor split for fused qkv with uneven K/V head sizes (ggml-org#29294) - metal: split fa kernels into per-dtype libraries (ggml-org#29329) - metal: FWHT kernels for block widths above 512 (ggml-org#29095) - CUDA: fuse RMS_NORM + SCALE into one kernel (ggml-org#29393) - common: extract shared unicode path/string helpers (ggml-org#29415) - common,rpc: simplify fs_create_directory_with_parents() (ggml-org#29432) - rpc: include nb in the get_alloc_size cache key (ggml-org#29283) - [SYCL] support sparse FA (ggml-org#28796) - musa: fix PH1 operator failures and build issues (ggml-org#29193) - HIP: bump HIP_VERSION required for fp8 (ggml-org#29231) - opencl: add q5_k bin kernel (ggml-org#29401) - hexagon: add q5_k quant type support (ggml-org#29123) - hexagon: use DMA for contiguous dim1 CONCAT (ggml-org#29404) - mtmd: fix mel preprocessor in LFM2 audio (ggml-org#29403) - vulkan: fix legacy GLSLC without cooperativeMatrix (ggml-org#29409) - gguf-py: ByteLevel processing defaults bos/eos to False (ggml-org#29422) - gguf-py: TemplateProcessing has final word on add_special_token (ggml-org#29417) Assisted-by: Pi
sky-mighty
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Sep 26, 2026
- ggml-org#28068 builds the GDN q/k l2norm as ggml_scale(ggml_rms_norm(x, eps/n), 1/sqrt(n)). This adds 2 SCALE nodes per GDN layer, 96 extra kernel launches per ubatch on Qwen3.8-27B (48 GDN layers). - The extra kernels take no measurable GPU time, but each launch has a host/driver cost. It is small with plain batch processing and about 10x larger with draft-mtp speculative decoding. - rms_norm_f32 gets a do_scale flag, the same pattern as do_multiply/do_add, so the fused path shares the kernel, the reduction and the launcher. It computes scale * (rsqrt(mean + eps) * x), which matches the unfused rms_norm + scale bit for bit, so ggml-org#28068 numerics are kept. - Fusion only fires when SCALE has no bias and the rms_norm output has a single consumer (ggml_can_fuse). - Metal (ggml-org#28948) and SYCL (ggml-org#28931) already fuse the same pattern. Measured on 2x GTX 1080 Ti (sm_61, PCIe 3.0 x16 + x4), i7-13700KF, Windows 11, driver 582.66, CUDA 12.9. Qwen3.8-27B-UD-Q4_K_XL, -ngl 99 -ts 53,47 -ot token_embd=CPU, master fee39dd. llama-bench -ub 128,512 -p 512,2048 -n 128 -r 5, tok/s: build pp512@128 pp2048@128 pp2048@512 tg128 master 367.7 419.1 385.4 12.90 master + fix 372.6 420.6 388.6 12.98 +1.3% +0.4% +0.8% +0.6% llama-server cold prefill, -c 56000 -ub 128 -b 2048, draft-mtp n-max 3 p-min 0.5, mean of 2 rounds x 3 reps: build pp 8000 pp 20000 master 356.5 322.0 master + fix 371.4 (+4.2%) 337.4 (+4.8%) - Launches per ubatch go from 1032.9 + 841.7 back to 978.9 + 799.7 (CUDA0 + CUDA1), the b10828 count. The GPU op sum is unchanged. - test-backend-ops RMS_NORM_SCALE, NORM_SCALE, RMS_NORM_MUL_ADD, RMS_NORM_MUL_ROPE, RMS_NORM, RMS_NORM_BACK, NORM, L2_NORM and SCALE all pass on both GPUs. - Perplexity is identical to the unfused build: 3.2030 +/- 0.0559 at -c 2048, 16 chunks. - Draft acceptance counts per request match the unfused build. Assisted-by: Claude Opus 5.5
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Overview
Adds Cuda backend fusion optimizations for MoE / Gated Delta Net paths
Fixes ~4% regression in prefil from models: fix GDN normalization from
maxtorsqrt#28068The same fusion, already merged on other backends:
Affected architectures: qwen35, qwen35moe, qwen3next, qwen4exp, kimi-linear, kimi-k3, bailingmoe3.
Additional information
llama-server -m Qwen3.8-27B-UD-Q4_K_XL.gguf -ngl 99 -np 1 -c 56000 -ub 128 -b 2048 -ts 53,47 -ot "token_embd\.weight=CPU" --spec-type draft-mtp --spec-draft-n-max 3 --spec-draft-p-min 0.5 --cache-ram 20480llama-bench -m Qwen3.8-27B-UD-Q4_K_XL.gguf -ngl 99 -ts 53/47 -ot "token_embd\.weight=CPU" -b 2048 -ub 128,512 -p 512,2048 -n 128 -r 5 (No speculative decoding)Correctness
llama-perplexity -c 2048 --chunks 16 -ub 128ggml_l2_norm)test-backend-ops test -b CUDA0maxtorsqrt#28068 (b10829) adds 96 launches per ubatch (2 per GDN layer x 48 layers).Scope and limits
Requirements