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sycl: stage bulk uploads (model loading) through a pinned ring buffer Python Type-Check #8: Commit c735bfd pushed by cwriter
4m 56s pr/09-sycl-pinned-upload-ring
pr/09-sycl-pinned-upload-ring
4m 56s
sycl: non-blocking pinned upload ring, vectorized KQ mask packing, ho… Python Type-Check #7: Commit b54ee6a pushed by cwriter
3m 55s performance_uplift_mega_branch
performance_uplift_mega_branch
3m 55s
Merge branch 'master' into wide_load_and_esimd Python Type-Check #6: Commit ff2de1e pushed by cwriter
3m 9s wide_load_and_esimd
wide_load_and_esimd
3m 9s
Merge branch 'master' into grouped_moe_xmx Python Type-Check #5: Commit 53095e0 pushed by cwriter
2m 57s grouped_moe_xmx
grouped_moe_xmx
2m 57s
sycl: lower peak device memory (GGML_SYCL_MEM_SAVE, on by default) Python Type-Check #4: Commit 1cb29c8 pushed by cwriter
3m 11s performance_uplift_mega_branch
performance_uplift_mega_branch
3m 11s
Adding wide-load mmvq for Q8_0 and esimd dmmv for q8_0 Python Type-Check #3: Commit a04a086 pushed by cwriter
4m 10s wide_load_and_esimd
wide_load_and_esimd
4m 10s
sycl : support gated DSV4_HC_PRE and optional HC_POST comb matrix Python Type-Check #2: Commit f0e82aa pushed by cwriter
3m 15s sycl-dsv4-hc
sycl-dsv4-hc
3m 15s
clarify comment Python Type-Check #1: Commit a46d6be pushed by cwriter
1d 0h 0m 1s topk_radix_select_master
topk_radix_select_master
1d 0h 0m 1s