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Wake SAI DMA writers and readers from transfer interrupts - #6

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JaxCalder wants to merge 1 commit into
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fix/dma-queue-wakeup
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JaxCalder wants to merge 1 commit into
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fix/dma-queue-wakeup

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@JaxCalder

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Problem

On STM32F746G-DISCO, the DMA queue holds 256 audio frames (about 5.3 ms at 48 kHz). wait_queue() used Dmod_ThreadSleep(1). With the firmware's 100 Hz FreeRTOS tick, that sleeps for up to 10 ms, so a writer waiting for room repeatedly misses the next DMA half-buffer and inserts silence.

Change

Use one bounded semaphore per DMA direction. Half/full transfer interrupts wake TX writers and RX readers as soon as a completed half changes queue capacity. Error and stop paths also wake pending operations. The semaphores are allocated per stream and cleaned up with the DMA context. The port links dmosi for this API.

Verification

  • cmake --build build-review-f7 --target dmsai_port -j4 passed for STM32F7.
  • Before the fix, a 0.375 s WM8994 note took 620 ms to queue and reported 183 TX underruns.
  • With the fix, the same note took 370 ms to queue and reported 0 TX underruns and 0 DMA transfer errors.
  • A complete 18 s WM8994 playback test on the connected STM32F746G-DISCO reported 0 TX underruns and 0 DMA transfer errors.

The test program is in choco-technologies/dmwm8994#2.

@JohnAmadis JohnAmadis closed this Oct 11, 2026
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2 participants