Issues

• F2 small_shell 0x10212415 — clarification needed for sh_cl_flr_assert / cl_sh_flr_done FLR contract

  aws/aws-fpga#811 · Filter by author Surmised opened on Oct 4, 2026

• F2 small shell: place_design (Vivado 2025.2) drops a physical-only VCC tie on two locked static slices at ~1.3M-cell CL scale -> HDPRVerify-41, AFI ingestion rejected (deterministic, scale-triggered)

  aws/aws-fpga#799 · Filter by author NabilAziz99 opened on Jul 31, 2026
  3

• AWS F2 Vitis platform mismatch: device shell v10212415 but public platforms are v10162423/v03072517

  aws/aws-fpga#795 · Filter by author rishikakushwah16 opened on May 30, 2026
  1

• AWS F2 FPGA to FPGA low latency communication

  aws/aws-fpga#791 · Filter by author sarangzambare opened on Apr 28, 2026
  1

• Question: XDMA Driver Install Guide vs ERRATA

  aws/aws-fpga#790 · Filter by author BasharSi45 opened on Apr 22, 2026
  2

• C_TEST not working

  aws/aws-fpga#781 · Filter by author d1story opened on Mar 31, 2026
  2

• support for multiple queues in SPP driver

  aws/aws-fpga#778 · Filter by author chenv24 opened on Feb 19, 2026
  1

• Add Riviera-PRO support

  aws/aws-fpga#770 · Filter by author yarons opened on Jan 22, 2026
  4

• Support for Vitis AFI flow (create_vitis_afi.sh) on F2 instances for new projects

  aws/aws-fpga#765 · Filter by author yzhwang opened on Dec 19, 2025
  1

• How are we supposed to set the clock and timing constraints? We provide a detailed example worked out that contradicts the documentation and fails to allow configuring the clock and timing.

  aws/aws-fpga#763 · Filter by author dsw opened on Dec 1, 2025
  12

• Inconsistent "F2 Clock Recipe Tables"

  aws/aws-fpga#761 · Filter by author dsw opened on Nov 30, 2025
  2

• Documentation on clock tools seems to be inconsistent.

  aws/aws-fpga#760 · Filter by author dsw opened on Nov 30, 2025
  1

• vivado 2025.2 support

  aws/aws-fpga#758 · Filter by author pylaterreur opened on Nov 24, 2025
  5

• cl_peek and cl_poke usage

  aws/aws-fpga#755 · Filter by author marie-anne-xu opened on Nov 2, 2025
  3

• generate_sim_file_list.py excludes .svh and .vh files

  aws/aws-fpga#754 · Filter by author ian-crombie opened on Oct 21, 2025
  1

• Tcl glob expression for .v and .sv files is broken: should be *.{s,}v

  aws/aws-fpga#746 · Filter by author dsw opened on Sep 4, 2025
  1

• vivado gives opaque error messages: "ERROR: [Synth 8-5809] Error generated from encrypted envelope."

  aws/aws-fpga#745 · Filter by author dsw opened on Sep 4, 2025
  5

• cl_dram_hbm_dma builds but running the way the tutorial says produces "unable to open read dma queue"

  aws/aws-fpga#744 · Filter by author dsw opened on Aug 31, 2025
  6

• should we ignore this message?: "WARNING: [Route ...] Router estimated timing not met."

  aws/aws-fpga#740 · Filter by author dsw opened on Aug 28, 2025
  3

• XVC PCIE Binary Fails to Connect to device

  aws/aws-fpga#739 · Filter by author ChrisKjellqvist opened on Aug 27, 2025
  1

• Read Write From DDR in F1 instance

  aws/aws-fpga#734 · Filter by author samtsaihello opened on Aug 3, 2025
  3

• How to access (Read/Write) DDR from AWS Shell

  aws/aws-fpga#732 · Filter by author harishkumar2108 opened on Jul 15, 2025
  25

• ENA to FPGA PCIe P2P networking feature?

  aws/aws-fpga#725 · Filter by author likewise opened on Jun 7, 2025
  1

• Want to create simple CL on F2, but running into significant issues

  aws/aws-fpga#723 · Filter by author dustydude42 opened on Jun 2, 2025
  6

• Vitis AFI creation on F2 instance

  aws/aws-fpga#713 · Filter by author jkato-vectology opened on May 20, 2025
  6