arch/arm/ameba: add shared I2C master driver (RTL8721Dx + RTL8721F)

arch/arm/src/common/ameba/Kconfig

@@ -55,4 +55,18 @@ config AMEBA_UART_TXBUFSIZE
 
 endif # AMEBA_UART
 
+config AMEBA_I2C
+	bool "I2C"
+	default n
+	select I2C
+	select I2C_DRIVER
+	---help---
+		Expose the Ameba I2C controllers (I2C0/I2C1) as NuttX I2C master
+		buses at /dev/i2cN.  The board selects which controller is used and
+		its SCL/SDA pads in its bring-up code.
+
+		The driver (arch/arm/src/common/ameba/ameba_i2c.c) sits on the SDK
+		fwlib register layer and drives the DesignWare I2C block in polling
+		mode.
+
 endmenu # Ameba Peripheral Support

arch/arm/src/common/ameba/ameba_i2c.h

@@ -0,0 +1,84 @@
+/****************************************************************************
+ * arch/arm/src/common/ameba/ameba_i2c.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_COMMON_AMEBA_AMEBA_I2C_H
+#define __ARCH_ARM_SRC_COMMON_AMEBA_AMEBA_I2C_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* The Ameba I2C controllers exposed to NuttX as I2C master buses.  The SCL
+ * and SDA pads are given with the same AMEBA_PA()/AMEBA_PB() PinName code
+ * used by the GPIO driver (see ameba_gpio.h); any pad can be routed to an
+ * I2C bus through the pin mux.
+ */
+
+#define AMEBA_I2C0            0
+#define AMEBA_I2C1            1
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Name: ameba_i2c_register
+ *
+ * Description:
+ *   Configure one Ameba I2C controller as a master bus and register it with
+ *   the NuttX I2C character driver at /dev/i2cN, where N is the bus number.
+ *
+ * Input Parameters:
+ *   bus    - The controller index, AMEBA_I2C0 or AMEBA_I2C1.  Also used as
+ *            the /dev/i2cN minor number.
+ *   sclpin - The SCL pad, encoded with AMEBA_PA()/AMEBA_PB().
+ *   sdapin - The SDA pad, encoded with AMEBA_PA()/AMEBA_PB().
+ *
+ * Returned Value:
+ *   Zero (OK) on success; a negated errno value on failure.
+ *
+ ****************************************************************************/
+
+int ameba_i2c_register(int bus, uint8_t sclpin, uint8_t sdapin);
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ARCH_ARM_SRC_COMMON_AMEBA_AMEBA_I2C_H */

arch/arm/src/rtl8721dx/CMakeLists.txt

@@ -48,6 +48,10 @@ if(CONFIG_AMEBA_UART)
   list(APPEND SRCS ${AMEBA_COMMON}/ameba_uart.c)
 endif()
 
+if(CONFIG_AMEBA_I2C)
+  list(APPEND SRCS ${AMEBA_COMMON}/ameba_i2c.c)
+endif()
+
 target_include_directories(arch PRIVATE ${AMEBA_COMMON})
 target_sources(arch PRIVATE ${SRCS})
 

arch/arm/src/rtl8721dx/Make.defs

@@ -58,6 +58,10 @@ ifeq ($(CONFIG_AMEBA_UART),y)
 CHIP_CSRCS += ameba_uart.c
 endif
 
+ifeq ($(CONFIG_AMEBA_I2C),y)
+CHIP_CSRCS += ameba_i2c.c
+endif
+
 ############################################################################
 # Realtek RTL8721Dx SDK integration
 #

arch/arm/src/rtl8721dx/ameba_board.mk

@@ -137,6 +137,15 @@ ifeq ($(CONFIG_AMEBA_UART),y)
 AMEBA_FWLIB_SRCS += $(AMEBA_SOC)/fwlib/ram_common/ameba_uart.c
 endif
 
+# I2C register layer.  Unlike UART, the fwlib I2C API is NOT in ROM: the I2C
+# driver (arch/.../common/ameba/ameba_i2c.c) calls I2C_Init/StructInit/Cmd and
+# I2C_MasterWrite/Read/RepeatRead, all of which are compiled from this RAM
+# source and must be linked in (--gc-sections drops the unused DMA/interrupt
+# helpers).
+ifeq ($(CONFIG_AMEBA_I2C),y)
+AMEBA_FWLIB_SRCS += $(AMEBA_SOC)/fwlib/ram_common/ameba_i2c.c
+endif
+
 # -Wno-int-conversion: the vendored SDK passes NULL to irq_register()'s u32
 # "Data" (interrupt context) argument in many places -- an intentional
 # NULL-as-context idiom.  Silence -Wint-conversion for the SDK fwlib sources

arch/arm/src/rtl8721dx/ameba_i2c_chip.h

@@ -0,0 +1,103 @@
+/****************************************************************************
+ * arch/arm/src/rtl8721dx/ameba_i2c_chip.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_RTL8721DX_AMEBA_I2C_CHIP_H
+#define __ARCH_ARM_SRC_RTL8721DX_AMEBA_I2C_CHIP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Per-chip I2C wiring for RTL8721DX (amebadplus).  The shared driver
+ * (arch/arm/src/common/ameba/ameba_i2c.c) includes this header to learn how
+ * many I2C controllers the chip exposes and, for each, its register base,
+ * peripheral-clock masks and crossbar pad-mux codes.  It also learns the
+ * chip's I2C_InitTypeDef layout through AMEBA_I2C_HAS_DMA_FIELDS.
+ *
+ * Contract for the other Ameba chips (amebalite / amebasmart / amebagreen2 /
+ * RTL8720F): supply a same-named header on the chip include path with the
+ * macros below.  What differs per chip, from the fwlib audit:
+ *
+ *   1. Controller count and bases: 2 controllers on amebadplus / amebalite /
+ *      amebagreen2 / RTL8720F, 3 on amebasmart (its I2C0 lives in the LP
+ *      domain).  The bases below are the NON-secure peripheral aliases; see
+ *      the note in ameba_i2c.c on why the secure alias must not be used.
+ *
+ *   2. APBPeriph "function" and "clock" masks are two separate lists because
+ *      RCC_PeriphClockCmd() takes them as distinct arguments.  They are
+ *      equal on every current chip, but amebasmart encodes the bits
+ *      differently (bit25/26/27, group bit30=0) versus (bit30|bit10/11)
+ *      here, so each chip must supply its own values.
+ *
+ *   3. Pad mux: amebadplus / amebalite / amebagreen2 / RTL8720F use a
+ *      crossbar with a distinct function code per SCL/SDA signal (supplied
+ *      as two lists).  amebasmart instead has a single generic
+ *      PINMUX_FUNCTION_I2C code (7) shared by every I2C pad; that chip fills
+ *      both the SCL and SDA lists with 7 and the driver needs no change.
+ *
+ *   4. I2C_InitTypeDef layout: amebadplus / amebagreen2 / RTL8720F carry
+ *      three DMA request-level fields (I2CTxDMARqLv / I2CRxDMARqLv /
+ *      I2CDMAMod) between I2CFilter and I2CAckAddr1 (21 u32 fields);
+ *      amebalite and amebasmart omit them (18 fields).  Define
+ *      AMEBA_I2C_HAS_DMA_FIELDS to 1 when present so the driver's mirror
+ *      struct stays byte-for-byte identical to the fwlib struct that
+ *      I2C_StructInit()/I2C_Init() use.
+ */
+
+#define AMEBA_NI2C                2
+
+/* NON-secure I2C register bases (I2C0_REG_BASE / I2C1_REG_BASE). */
+
+#define AMEBA_I2C_BASES           { 0x41108000ul, 0x4110a000ul }
+
+/* APBPeriph_I2Cx (function) and APBPeriph_I2Cx_CLOCK masks.  Equal on this
+ * chip; kept as two lists so chips where they differ can supply both.
+ */
+
+#define AMEBA_I2C_APBPERIPH       \
+        { (((uint32_t)1 << 30) | ((uint32_t)1 << 10)), \
+          (((uint32_t)1 << 30) | ((uint32_t)1 << 11)) }
+
+#define AMEBA_I2C_APBPERIPH_CLK   \
+        { (((uint32_t)1 << 30) | ((uint32_t)1 << 10)), \
+          (((uint32_t)1 << 30) | ((uint32_t)1 << 11)) }
+
+/* Crossbar pad-mux function codes (PINMUX_FUNCTION_I2Cx_SCL/SDA), indexed by
+ * controller.  On a chip with one generic I2C code, set both to that code.
+ */
+
+#define AMEBA_I2C_SCLFID          { 48, 50 }  /* I2C0_SCL, I2C1_SCL */
+#define AMEBA_I2C_SDAFID          { 49, 51 }  /* I2C0_SDA, I2C1_SDA */
+
+/* The amebadplus I2C_InitTypeDef carries the DMA request-level fields. */
+
+#define AMEBA_I2C_HAS_DMA_FIELDS  1
+
+#endif /* __ARCH_ARM_SRC_RTL8721DX_AMEBA_I2C_CHIP_H */

arch/arm/src/rtl8721f/CMakeLists.txt

@@ -54,6 +54,10 @@ if(CONFIG_AMEBA_UART)
   list(APPEND SRCS ${AMEBA_COMMON}/ameba_uart.c)
 endif()
 
+if(CONFIG_AMEBA_I2C)
+  list(APPEND SRCS ${AMEBA_COMMON}/ameba_i2c.c)
+endif()
+
 target_include_directories(arch PRIVATE ${AMEBA_COMMON})
 target_sources(arch PRIVATE ${SRCS})
 
@@ -108,6 +112,14 @@ if(CONFIG_AMEBA_UART)
   list(APPEND AMEBA_FWLIB_SRCS ${AMEBA_SOC}/fwlib/ram_common/ameba_uart.c)
 endif()
 
+# I2C register layer.  Unlike UART, the fwlib I2C API is NOT in ROM: the I2C
+# driver (arch/.../common/ameba/ameba_i2c.c) calls I2C_Init/StructInit/Cmd and
+# I2C_MasterWrite/Read/RepeatRead, all compiled from this RAM source and linked
+# in (--gc-sections drops the unused DMA/interrupt helpers).
+if(CONFIG_AMEBA_I2C)
+  list(APPEND AMEBA_FWLIB_SRCS ${AMEBA_SOC}/fwlib/ram_common/ameba_i2c.c)
+endif()
+
 # Silence a couple of warnings the vendored SDK sources trip under NuttX's
 # warning set, scoped to this fwlib compile only (never relaxing NuttX's own):
 # -Wno-int-conversion: the SDK passes NULL to irq_register()'s u32 "Data"

arch/arm/src/rtl8721f/Make.defs

@@ -64,6 +64,10 @@ ifeq ($(CONFIG_AMEBA_UART),y)
 CHIP_CSRCS += ameba_uart.c
 endif
 
+ifeq ($(CONFIG_AMEBA_I2C),y)
+CHIP_CSRCS += ameba_i2c.c
+endif
+
 ############################################################################
 # Realtek RTL8721F SDK integration
 #

arch/arm/src/rtl8721f/ameba_board.mk

@@ -149,6 +149,15 @@ endif
 ifeq ($(CONFIG_AMEBA_UART),y)
 AMEBA_FWLIB_SRCS += $(AMEBA_SOC)/fwlib/ram_common/ameba_uart.c
 endif
+
+# I2C register layer.  Unlike UART, the fwlib I2C API is NOT in ROM: the I2C
+# driver (arch/.../common/ameba/ameba_i2c.c) calls I2C_Init/StructInit/Cmd and
+# I2C_MasterWrite/Read/RepeatRead, all of which are compiled from this RAM
+# source and must be linked in (--gc-sections drops the unused DMA/interrupt
+# helpers).
+ifeq ($(CONFIG_AMEBA_I2C),y)
+AMEBA_FWLIB_SRCS += $(AMEBA_SOC)/fwlib/ram_common/ameba_i2c.c
+endif
 # -Wno-int-conversion: the vendored SDK passes NULL to irq_register()'s u32
 # "Data" (interrupt context) argument in many places -- an intentional
 # NULL-as-context idiom.  Silence -Wint-conversion for the SDK fwlib sources

arch/arm/src/rtl8721f/ameba_i2c_chip.h

@@ -0,0 +1,96 @@
+/****************************************************************************
+ * arch/arm/src/rtl8721f/ameba_i2c_chip.h
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_RTL8721F_AMEBA_I2C_CHIP_H
+#define __ARCH_ARM_SRC_RTL8721F_AMEBA_I2C_CHIP_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <stdint.h>
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+/* Per-chip I2C wiring for RTL8721F (amebagreen2).  The shared driver
+ * (arch/arm/src/common/ameba/ameba_i2c.c) includes this header to learn how
+ * many I2C controllers the chip exposes and, for each, its register base,
+ * peripheral-clock masks and crossbar pad-mux codes.  It also learns the
+ * chip's I2C_InitTypeDef layout through AMEBA_I2C_HAS_DMA_FIELDS.
+ *
+ * The values below come from the amebagreen2 fwlib headers:
+ *
+ *   1. Two controllers (I2C0/I2C1).  The bases are the NON-secure peripheral
+ *      aliases (I2C0_REG_BASE / I2C1_REG_BASE in hal_platform.h, 0x4100_8000
+ *      / 0x4100_9000; the secure aliases I2Cx_REG_BASE_S live at
+ *      0x5100_xxxx).  NuttX runs on the KM4 core in the SECURE state, but
+ *      the I2C block responds on its non-secure alias, so the driver hands
+ *      the fwlib these non-secure bases (see the note in ameba_i2c.c).
+ *
+ *   2. APBPeriph_I2Cx (function) and APBPeriph_I2Cx_CLOCK masks
+ *      (sysreg_lsys.h): group bit30 plus bit10 (I2C0) / bit11 (I2C1).  Equal
+ *      for the function and clock arguments on this chip.
+ *
+ *   3. Crossbar pad-mux: a distinct function code per SCL/SDA signal
+ *      (PINMUX_FUNCTION_I2Cx_SCL/SDA in ameba_pinmux.h): 89/90 for I2C0 and
+ *      91/92 for I2C1.
+ *
+ *   4. The amebagreen2 I2C_InitTypeDef carries the three DMA request-level
+ *      fields (I2CTxDMARqLv / I2CRxDMARqLv / I2CDMAMod) between I2CFilter
+ *      and I2CAckAddr1, so AMEBA_I2C_HAS_DMA_FIELDS is 1 to keep the
+ *      driver's mirror struct byte-for-byte identical to the fwlib one.
+ */
+
+#define AMEBA_NI2C                2
+
+/* NON-secure I2C register bases (I2C0_REG_BASE / I2C1_REG_BASE). */
+
+#define AMEBA_I2C_BASES           { 0x41008000ul, 0x41009000ul }
+
+/* APBPeriph_I2Cx (function) and APBPeriph_I2Cx_CLOCK masks.  Equal on this
+ * chip; kept as two lists so chips where they differ can supply both.
+ */
+
+#define AMEBA_I2C_APBPERIPH       \
+        { (((uint32_t)1 << 30) | ((uint32_t)1 << 10)), \
+          (((uint32_t)1 << 30) | ((uint32_t)1 << 11)) }
+
+#define AMEBA_I2C_APBPERIPH_CLK   \
+        { (((uint32_t)1 << 30) | ((uint32_t)1 << 10)), \
+          (((uint32_t)1 << 30) | ((uint32_t)1 << 11)) }
+
+/* Crossbar pad-mux function codes (PINMUX_FUNCTION_I2Cx_SCL/SDA), indexed by
+ * controller.
+ */
+
+#define AMEBA_I2C_SCLFID          { 89, 91 }  /* I2C0_SCL, I2C1_SCL */
+#define AMEBA_I2C_SDAFID          { 90, 92 }  /* I2C0_SDA, I2C1_SDA */
+
+/* The amebagreen2 I2C_InitTypeDef carries the DMA request-level fields. */
+
+#define AMEBA_I2C_HAS_DMA_FIELDS  1
+
+#endif /* __ARCH_ARM_SRC_RTL8721F_AMEBA_I2C_CHIP_H */