All pull requests

Pull requests

• [Loom] Own AIE2P logical topology admission

  #1061·benvanik opened Sep 26, 2026Collaborator·

  ·

• [Loom] Replace word-memory snapshots with a scenario

  #1060·benvanik opened Sep 26, 2026Collaborator·

  ·

• [Loom] Recover bounded coordinates from aligned index masks

  #1059·benvanik opened Sep 26, 2026Collaborator·

  ·

• [Loom] Bound loop-edge relocation conflicts and matching

  #1058·benvanik opened Sep 26, 2026Collaborator·

  ·

• [Loom] Lower lane-varying pipeline length splits

  #1057·benvanik opened Sep 26, 2026Collaborator·

  ·

• [Loom/XDNA] Emit leaves from self-contained physical plans

  #1056·benvanik opened Sep 26, 2026Collaborator·

  ·

• [Loom] Report exact LDS bank service for partial-wave accesses

  #1042·benvanik opened Sep 26, 2026Collaborator·

  ·

• [CI] Consolidate Loom checks into one workflow

  #964·benvanik opened Sep 24, 2026Collaborator·

  ·

• [HIP] Complete graph construction and stream capture

  #914·AWoloszyn opened Sep 23, 2026Collaborator·

  ·

• [Loom] Spread independent AIE2P workers across shim columns

  #805·atassis opened Sep 21, 2026Contributor·

  ·
  4

• [hip] Extend kernel launch parameters.

  #788·AWoloszyn opened Sep 21, 2026Collaborator·

  ·

• [Experiment] AMDGPU SDMA transfer/compute overlap

  #625·Groverkss opened Sep 17, 2026·

  ·

• [HIP] Implement IPC memory and event handles

  #624·zjgarvey opened Sep 17, 2026Collaborator·3/3·

  ·

• [HRX] Align graph executable block storage

  #623·zjgarvey opened Sep 17, 2026Collaborator·2/3·

  ·

• [HAL/AMDGPU] Support both ROCr queue creation interfaces

  #617·zjgarvey opened Sep 17, 2026Collaborator·1/3·

  ·

• [HAL/AMDGPU] Add fixed masked execution queues

  #444·zjgarvey opened Aug 27, 2026Collaborator·

  ·
  9

• [HRX] Export the allocation in hrx_buffer_get_device_ptr

  #393·Geramy opened Aug 21, 2026·

  ·
  3

• [HRX/CUDA] Fix inverted query results and build the binding under Bazel

  #383·zjgarvey opened Aug 17, 2026Collaborator·

  ·
  1

• [HAL/AMDGPU] Snapshot static indirect dispatch tables at queue issue

  #376·benvanik opened Aug 17, 2026Collaborator·

  ·

• [AMDGPU] Emplace implicit kernargs per field to support unaligned/partial hidden blocks

  #201·zjgarvey opened Jul 20, 2026Collaborator·

  ·

• [HIP] Null the module out-handle before any failed-load error path

  #200·zjgarvey opened Jul 20, 2026Collaborator·

  ·

• [HIP] Record kernel attributes on module symbols

  #199·AWoloszyn opened Jul 20, 2026Collaborator·

  ·

• [HIP] Support host-visible memory and runtime services

  #198·AWoloszyn opened Jul 20, 2026Collaborator·

  ·
  5

• [HIP] Add TheRock test runner

  #157·AWoloszyn opened Jun 30, 2026Collaborator·

  ·

• Add amdxdna HAL driver for AMD XDNA NPUs

  #37·jtuyls opened Jun 5, 2026Collaborator·

  ·
  3