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Works #1
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4083601
library binding
ngc92 d22aac3
loop over input vectors in C++
ngc92 54268b3
baseline gemm kernel
ngc92 c82b2ac
renaming
ngc92 863f757
enable gemm for arbitrary n
ngc92 fe0b16e
fix shared load bank conflicts
ngc92 3416a74
enable N=8 gemv
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1 +1 @@ | ||
| from .po2_gemv import po2_gemv | ||
| from .kernels import po2_gemv, po2_gemm |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,50 @@ | ||
| from pathlib import Path | ||
| from torch.utils.cpp_extension import load | ||
| import torch | ||
|
|
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| _here = Path(__file__).parent | ||
|
|
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| _ext = load( | ||
| name="po2_gemv_ext", | ||
| sources=[ | ||
| str(_here / "po2_binding.cpp"), | ||
| str(_here / "po2_gemv_kernel.cu"), | ||
| str(_here / "po2_gemm_kernel.cu"), | ||
| ], | ||
| extra_include_paths=[str(_here)], | ||
| extra_cuda_cflags=[ | ||
| "-O3", | ||
| "--use_fast_math", | ||
| "-std=c++17", | ||
| "-expt-relaxed-constexpr", | ||
| "-U__CUDA_NO_HALF_OPERATORS__", | ||
| "-U__CUDA_NO_HALF_CONVERSIONS__", | ||
| "-U__CUDA_NO_HALF2_OPERATORS__", | ||
| "-U__CUDA_NO_BFLOAT16_OPERATORS__", | ||
| "-U__CUDA_NO_BFLOAT16_CONVERSIONS__", | ||
| "-U__CUDA_NO_BFLOAT162_OPERATORS__", | ||
| ], | ||
| extra_cflags=["-O3", "-std=c++17"], | ||
| verbose=False, | ||
| ) | ||
|
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| @torch.library.custom_op("po2::gemv", mutates_args=()) | ||
| def po2_gemv(vecs: torch.Tensor, values: torch.Tensor, scales: torch.Tensor, LUTs: torch.Tensor) -> torch.Tensor: | ||
| return _ext.po2_gemv(vecs, values, scales, LUTs) | ||
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| @po2_gemv.register_fake | ||
| def po2_gemv_fake(vecs, values, scales, LUTs): | ||
| #assert values.dim == 2, values.shape | ||
| if vecs.dim() == 2: | ||
| return torch.empty((vecs.shape[0], values.shape[0]), device=vecs.device, dtype=vecs.dtype) | ||
| else: | ||
| return torch.empty((values.shape[0],), device=vecs.device, dtype=vecs.dtype) | ||
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|
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| @torch.library.custom_op("po2::gemm", mutates_args=()) | ||
| def po2_gemm(x: torch.Tensor, values: torch.Tensor, scales: torch.Tensor, LUTs: torch.Tensor) -> torch.Tensor: | ||
| return _ext.po2_gemm(x, values, scales, LUTs) | ||
|
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| @po2_gemm.register_fake | ||
| def po2_gemm_fake(x, values, scales, LUTs): | ||
| return torch.empty((x.shape[0], values.shape[0]), device=x.device, dtype=x.dtype) |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,135 @@ | ||
| // Copyright (c) 2026, IST Austria, developed by Erik Schultheis | ||
| // SPDX-License-Identifier: Apache-2.0 | ||
| // | ||
|
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| #include <cuda_bf16.h> | ||
| #include <cstdio> | ||
| #include "vec.cuh" | ||
| #include "utils.cuh" | ||
| #include "po2_kernels.cuh" | ||
|
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| template<typename Scaler, int GroupSize=16> | ||
| __global__ __launch_bounds__(64, 6) void gemm_tn_baseline(nv_bfloat16* __restrict__ out, const nv_bfloat16* __restrict__ x, const unsigned* __restrict__ values, | ||
| const std::byte* __restrict__ scales, const nv_bfloat16* __restrict__ LUTs, int m, int n, int k) { | ||
| using bf16x8_t = GenericVector<nv_bfloat16, 8>; | ||
| static_assert(GroupSize % 8 == 0, "GroupSize must divisible by 8"); | ||
|
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| int i = blockIdx.x * 64; | ||
| int j = blockIdx.y * 64; | ||
| if (i >= m || j >= n) return; | ||
|
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| __shared__ nv_bfloat16 LUTs_shared[32]; | ||
| __shared__ nv_bfloat16 x_smem[64 * 16]; | ||
| __shared__ nv_bfloat16 decoded[64][16]; | ||
| __shared__ float scales_smem[64]; | ||
| if (threadIdx.x < 32) { | ||
| LUTs_shared[threadIdx.x] = LUTs[threadIdx.x]; | ||
| } | ||
| __syncthreads(); | ||
|
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| scales += i * (k / GroupSize); | ||
| values += i * (k / 8); | ||
|
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| bf16x8_t acc[8] = { | ||
| bf16x8_t::zeros(), bf16x8_t::zeros(), bf16x8_t::zeros(), bf16x8_t::zeros(), | ||
| bf16x8_t::zeros(), bf16x8_t::zeros(), bf16x8_t::zeros(), bf16x8_t::zeros() | ||
| }; | ||
|
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| auto x_swizzle = [](int p, int q) { | ||
| int pf = p % 8; | ||
| int pg = p / 8; | ||
| return pg * 8 + q * 64 + pf * 128; | ||
| }; | ||
|
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| for (int s = 0; s < k / 16; ++s) { | ||
|
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| // fetch x | ||
| for (int u = threadIdx.x / 4; u < 32; u += 16) { | ||
| int t = ((threadIdx.x / 2) % 2) * 32; | ||
| if (j + u + t < n) { | ||
| bf16x8_t v = bf16x8_t::load(x + 16 * s + (j + u + t) * k + 8 * (threadIdx.x % 2)); | ||
| v.store(x_smem + x_swizzle(u + t, threadIdx.x % 2)); | ||
| } | ||
| } | ||
|
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| // decode values | ||
| for (int t = 0; t < 64; t += 32) { | ||
| unsigned val = values[2 * s + (threadIdx.x / 2 + t) * (k / 8) + threadIdx.x % 2]; | ||
| std::byte scale = scales[s / (GroupSize / 16) + (threadIdx.x / 2 + t) * (k / GroupSize)]; | ||
| auto [sf, group] = Scaler::decode_scale(scale); | ||
| bf16x8_t w; | ||
| lookup<bf16x8_t&>(w, val, group, LUTs_shared); | ||
| w.store(&decoded[threadIdx.x / 2 + t][(threadIdx.x % 2) * 8]); | ||
| scales_smem[threadIdx.x / 2 + t] = sf; // double write | ||
|
ngc92 marked this conversation as resolved.
|
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| } | ||
|
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| __syncthreads(); | ||
|
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| for (int u = 0; u < 8; ++u) { | ||
| bf16x8_t a1 = bf16x8_t::load(x_smem + x_swizzle(8*(threadIdx.x%8) + u, 0)); | ||
| bf16x8_t a2 = bf16x8_t::load(x_smem + x_swizzle(8*(threadIdx.x%8) + u, 1)); | ||
| for (int v = 0; v < 8; ++v) { | ||
| float inner = 0.f; | ||
| bf16x8_t b = bf16x8_t::load(&decoded[8*(threadIdx.x/8) + v][0]); | ||
| for (int w = 0; w < 8; ++w) { | ||
| inner = fma(a1[w], b[w], inner); | ||
| } | ||
|
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| b = bf16x8_t::load(&decoded[8*(threadIdx.x/8) + v][8]); | ||
| for (int w = 0; w < 8; ++w) { | ||
| inner = fma(a2[w], b[w], inner); | ||
| } | ||
| acc[u][v] += inner * scales_smem[8*(threadIdx.x/8) + v]; | ||
| } | ||
| } | ||
| __syncthreads(); | ||
| } | ||
|
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| for (int u = 0; u < 8; ++u) { | ||
| if (j + u + (threadIdx.x%8)*8 < n) { | ||
| acc[u].store(out + (j + u + (threadIdx.x%8)*8) * m + i + (threadIdx.x / 8) * 8); | ||
| } | ||
| } | ||
| } | ||
|
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| void launch_po2_gemm_tn_baseline( | ||
| nv_bfloat16* out, | ||
| const nv_bfloat16* x, | ||
| const unsigned* values, | ||
| const std::byte* scales, | ||
| const nv_bfloat16* LUTs, | ||
| SFType sf_type, int group_size, | ||
| int m, int n, int k, | ||
| cudaStream_t stream | ||
| ) { | ||
| if (k % 16 != 0) { | ||
| std::fprintf(stderr, "po2_gemm_tn_baseline: k (%d) must be a multiple of 16\n", k); | ||
| std::abort(); | ||
| } | ||
| if (m % 64 != 0) { | ||
| std::fprintf(stderr, "po2_gemm_tn_baseline: m (%d) must be a multiple of 64\n", m); | ||
| std::abort(); | ||
| } | ||
| if (group_size != 16 && group_size != 32) { | ||
| std::fprintf(stderr, "po2_gemm_tn_baseline: group_size (%d) must be 16 or 32\n", group_size); | ||
| std::abort(); | ||
| } | ||
|
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| dim3 grid((m + 63) / 64, (n + 63) / 64); | ||
| dim3 block(64); | ||
|
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| if (sf_type == SFType::G1E4M3 && group_size == 16) { | ||
| gemm_tn_baseline<E4M3Scaling, 16><<<grid, block, 0, stream>>>(out, x, values, scales, LUTs, m, n, k); | ||
| } else if (sf_type == SFType::G1E7M0 && group_size == 16) { | ||
| gemm_tn_baseline<E7M0Scaling, 16><<<grid, block, 0, stream>>>(out, x, values, scales, LUTs, m, n, k); | ||
| } else if (sf_type == SFType::G1E4M3 && group_size == 32) { | ||
| gemm_tn_baseline<E4M3Scaling, 32><<<grid, block, 0, stream>>>(out, x, values, scales, LUTs, m, n, k); | ||
| } else if (sf_type == SFType::G1E7M0 && group_size == 32) { | ||
| gemm_tn_baseline<E7M0Scaling, 32><<<grid, block, 0, stream>>>(out, x, values, scales, LUTs, m, n, k); | ||
| } else { | ||
| std::fprintf(stderr, "po2_gemm_tn_baseline: unsupported sf_type (%d)\n", static_cast<int>(sf_type)); | ||
| std::abort(); | ||
| } | ||
|
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| CUDA_CHECK(cudaGetLastError()); | ||
| } | ||
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