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fix(esp32): use SysV size format to separate flash .rodata from DRAM - #1297

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zackees merged 3 commits into
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fix/1261-esp32c6-ram-size-sysv
Aug 10, 2026
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fix(esp32): use SysV size format to separate flash .rodata from DRAM#1297
zackees merged 3 commits into
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fix/1261-esp32c6-ram-size-sysv

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@zackees zackees commented Aug 10, 2026

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Fixes #1261 — ESP32-C6 RAM reported as 1.88MB / 320KB (602.5%).

Problem

The Berkeley size format lumps .flash.rodata (flash-resident) into the data column alongside .dram0.data (RAM-resident). For ESP32-C6 this inflates the RAM figure by counting flash-rodata as if it were RAM, producing impossible percentages.

The Berkeley output for an ESP32-C6 build:

   text    data     bss     dec     hex filename
  89012  456789    8192  553993   87409 firmware.elf
  • data = 456789 includes both .flash.rodata and .dram0.data
  • total_ram = data + bss = 465,981 — but real DRAM is only ~10KB
  • With max_ram = 320KB: 465,981 / 327,680 = 142% (or higher for larger builds)

Fix

Switch to size -A (SysV format) which lists each section individually with its name:

section             size         addr
.flash.text        89012    0x42000020
.flash.rodata     456789    0x42015c34
.dram0.data         1234    0x3fc80000
.dram0.bss          5678    0x3fc81234

parse_esp32_size_output classifies by section prefix:

  • Flash: .flash.*, .rodata*, .iram0.*, .text
  • RAM: .dram0.*, .dram.*

Returns None when no ESP32-prefixed sections are detected, preserving the standard Berkeley parser for non-ESP32 builds.

🤖 Generated with Claude Code

Summary by CodeRabbit

  • New Features

    • Added ESP32-specific size reporting for flash, RAM data, and BSS sections.
    • Preserves configured flash and RAM limits in size reports.
    • Handles unsupported or unrecognized size output gracefully.
  • Bug Fixes

    • Improved ESP32 size analysis by replacing generic reporting with platform-specific parsing.
    • Added handling for command failures, headers, totals, and non-ESP32 output.

Fixes #1261 — ESP32-C6 RAM reported as 1.88MB / 320KB (602.5%).

The Berkeley size format lumps .flash.rodata (flash-resident) into
the data column alongside .dram0.data (RAM-resident). For ESP32-C6
this inflates the RAM figure by counting flash-rodata as if it were RAM.

Switch to size -A (SysV format) which lists each section with its name
and address. parse_esp32_size_output classifies by section prefix:
  - Flash: .flash.*, .rodata*, .iram0.*, .text
  - RAM:   .dram0.*, .dram.*

Falls back to None when no ESP32-prefixed sections are detected,
so non-ESP32 targets sharing this path get the standard Berkeley parser.

Co-Authored-By: Claude <noreply@anthropic.com>
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coderabbitai Bot commented Aug 10, 2026

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Review Change Stack

📝 Walkthrough

Walkthrough

ESP32 size reporting now runs size -A and parses SysV section output. The parser separates flash, RAM data, and BSS usage, preserves configured limits, rejects non-ESP32 output, and is used by the ESP32 linker.

Changes

ESP32 size reporting

Layer / File(s) Summary
ESP32 size command and parser
crates/fbuild-build-esp/src/esp32/size_report.rs
Runs size -A with a timeout, parses SysV output, separates flash and RAM sections, preserves limits, and validates headers, totals, and fallback output.
ESP32 linker integration
crates/fbuild-build-esp/src/esp32/mod.rs, crates/fbuild-build-esp/src/esp32/esp32_linker.rs
Registers the size_report module and delegates ESP32 size reporting to esp32_report_size.

Estimated code review effort: 3 (Moderate) | ~20 minutes

Sequence Diagram(s)

sequenceDiagram
  participant ESP32Linker
  participant esp32_report_size
  participant SizeTool
  participant parse_esp32_size_sysv
  ESP32Linker->>esp32_report_size: Report ELF size
  esp32_report_size->>SizeTool: Run `size -A`
  SizeTool-->>esp32_report_size: Return SysV output
  esp32_report_size->>parse_esp32_size_sysv: Parse sections
  parse_esp32_size_sysv-->>ESP32Linker: Return SizeInfo
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Possibly related PRs

🚥 Pre-merge checks | ✅ 4 | ❌ 1

❌ Failed checks (1 warning)

Check name Status Explanation Resolution
Linked Issues check ⚠️ Warning The changes fix ESP32 RAM accounting, but they do not address the linked issue's build_info.json metadata requirement. Add or explicitly defer the example-scoped build_info.json metadata fix, and verify that successful ESP32-C6 builds generate the file.
✅ Passed checks (4 passed)
Check name Status Explanation
Description Check ✅ Passed Check skipped - CodeRabbit’s high-level summary is enabled.
Title check ✅ Passed The title clearly describes the ESP32 SysV size-reporting change and the separation of flash and DRAM usage.
Out of Scope Changes check ✅ Passed The changes remain within the linked issue's ESP32 size-section accounting scope.
Docstring Coverage ✅ Passed No functions found in the changed files to evaluate docstring coverage. Skipping docstring coverage check.
✨ Finishing Touches
📝 Generate docstrings
  • Create stacked PR
  • Commit on current branch
🧪 Generate unit tests (beta)
  • Create PR with unit tests
  • Commit unit tests in branch fix/1261-esp32c6-ram-size-sysv

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zackees and others added 2 commits August 9, 2026 21:45
Move the SysV size parser and its tests to a new size_report.rs submodule
so esp32_linker.rs stays under the 1000-line ceiling enforced by the LOC
gate CI job. No behavioral change.

Co-Authored-By: Claude <noreply@anthropic.com>
Co-Authored-By: Claude <noreply@anthropic.com>

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Caution

Some comments are outside the diff and can’t be posted inline due to platform limitations.

⚠️ Outside diff range comments (1)
crates/fbuild-build-esp/src/esp32/esp32_linker.rs (1)

553-566: 🎯 Functional Correctness | 🟡 Minor | ⚡ Quick win

Invalidate the size cache when changing ESP32 size parsing.

SizeArtifactCache only stores version, elf_stamp, and size_info. Since ESP32 now reports SYSV sections instead of Berkeley column values, report_size() can return unchanged ELF RAM usage from the old format. Add a size-report format version to the cache identity or bump the build fingerprint version while changing the parser.

🤖 Prompt for AI Agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

In `@crates/fbuild-build-esp/src/esp32/esp32_linker.rs` around lines 553 - 566,
Update the size-cache identity used by report_size and SizeArtifactCache to
include a version for the ESP32 size-report format, and bump it for the SYSV
section parsing change. Ensure load_cached_size rejects entries created with the
previous format while preserving cache reuse for matching versions.
🤖 Prompt for all review comments with AI agents
Verify each finding against current code. Fix only still-valid issues, skip the
rest with a brief reason, keep changes minimal, and validate.

Outside diff comments:
In `@crates/fbuild-build-esp/src/esp32/esp32_linker.rs`:
- Around line 553-566: Update the size-cache identity used by report_size and
SizeArtifactCache to include a version for the ESP32 size-report format, and
bump it for the SYSV section parsing change. Ensure load_cached_size rejects
entries created with the previous format while preserving cache reuse for
matching versions.

ℹ️ Review info
⚙️ Run configuration

Configuration used: Path: .coderabbit.yaml

Review profile: CHILL

Plan: Pro Plus

Run ID: 6aed74c6-80c5-4d51-9189-c31dc84d2612

📥 Commits

Reviewing files that changed from the base of the PR and between 067732d and 91afd8e.

📒 Files selected for processing (3)
  • crates/fbuild-build-esp/src/esp32/esp32_linker.rs
  • crates/fbuild-build-esp/src/esp32/mod.rs
  • crates/fbuild-build-esp/src/esp32/size_report.rs

@zackees
zackees merged commit 521c6ff into main Aug 10, 2026
22 checks passed
@zackees
zackees deleted the fix/1261-esp32c6-ram-size-sysv branch August 10, 2026 05:07
@fastled-project-sync fastled-project-sync Bot moved this to Triage in FastLED Tracker Aug 11, 2026
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fix(esp32c6): report linked RAM usage and preserve build metadata

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