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AVX-VNNI-INT(8/16) support - #6058
pthariensflame wants to merge 2 commits into
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Oh my. |
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Should be "ready" for review at this point, inasmuch as untested code can be. |
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I'm contemplating what I need to do to get this unittested on real hardware. I want to write a bunch of unittests before this merges directly. Trying to find the best way forward. |
There is no rush here, and your efforts are extremely appreciated no matter how long it takes or what needs to happen to test this. Thank you so much for taking our contribution-for-the-sake-of-a-fun-challenge seriously; we are willing to wait until cores supporting these extensions are much more accessible if that helps take pressure off. |
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I ordered an Intel Core 7 350 device which supports these extensions so I should be able to get to writing unittests next week. |
Oooh! Should be good for testing the AVX-IFMA and SHA512 extensions too. |
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It compiles! And it appears to produce reasonable code (at least by inspection)! 🎉 |
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Looks like the main thing missing in CI is that you're unconditionally using a |
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Should be fixed now; we have no idea how to update the unit tests so that they reflect the intended codegen. |
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For instcountci it's best to compile with cmake options |
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InstcountCI has been updated! Seems like we may want DOTPROD and I8MM versions of the VEX_map2 VNNI-INT(8/16) tests, since those aren't there right now. Should we try to add them? EDIT: We will try to add them! |
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How exactly does InstCountCI succeed on x86_64 but fail on AArch64 when our local testing took place on AArch64 Linux??? |
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Hooray! Only one specific failure left in the tests; investigating. |
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| "zip1 z2.s, z0.s, z1.s", | ||
| "umullb z0.s, z17.h, z18.h", | ||
| "umullt z1.s, z17.h, z18.h", | ||
| "zip2 z3.s, z0.s, z1.s", | ||
| "addp z2.s, p7/m, z2.s, z3.s", | ||
| "uzp2 z1.s, z2.s, z2.s", | ||
| "uzp1 z2.s, z2.s, z2.s", |
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This kind of thing, with the repeated zipping and unzipping, should really be able to be optimized away somehow. We have no idea how to go about that though.
This builds on the recently-added AVX-VNNI support and adds the rest of the combinations of signednesses; there are no tests yet because we were unable to build FEX locally or get our IDE to cooperate on understanding the codebase, so this code is only maybe correct (or even compilable). Advice for how to proceed would be wonderful.
No LLMs were used in any capacity during any part of creating this code; this is good old-fashioned copy-pasting and modifying the copies, with a sprinkle of basic understanding of how the A64 ISA works and a fair amount of staring at the Intel ASDM.
EDIT: We can now build and test FEX, and have updated the tests!