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fix(smu): map Vermeer L3 groups to physical CCDs - #23

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iam4x:fix/vermeer-physical-ccd-map
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iam4x wants to merge 1 commit into
Daaboulex:mainfrom
iam4x:fix/vermeer-physical-ccd-map

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@iam4x iam4x commented Oct 15, 2026

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Summary

On this Ryzen 5 5600X, physical CCD 0 is disabled and Linux numbers the surviving CCD 1 as L3 group 0. CoreCycler used that logical index to read CCD 0's core fuse, found no active slots, and disabled per-core Curve Optimizer.

Read the CCD-disable fuses and map Linux's L3 groups to physical CCDs before reading core fuses or encoding CO commands. Keep per-core CO disabled if the active CCD count disagrees with the OS. The register decoding follows ryzen_smu's get_fuse_topology, linked in the hardware documentation.

Related to #11. This handles a disabled CCD as well as disabled cores within a CCD.

Test plan

  • 790 focused SMU, topology, and contract tests pass. New regressions use the exact 5600X fuse values, check the physical CCD and slot used by simulated writes, and cover a full single CCD, both full 5950X CCDs, unreadable fuses, and inconsistent CCD counts.
  • The live test_core_slot_map_matches_the_live_core_disable_fuse contract passes. The installed GUI connects, reads all six offsets, and enables the Curve Optimizer controls. No live CO write test was run.
  • The complete unit suite outside the sandbox passes: pytest -q -m 'not slow and not contract', 2,908 passed and 2 skipped.
  • The full non-slow run has the same five failures on this branch and unmodified beb4d89: four Unix-socket tests blocked by the sandbox and the installed mprime 30.19 failing the verified-version check for 31.4. The socket tests pass outside the sandbox. Both runs report 99.99% total coverage with the same missing line in gui/smu_tab.py; both modified SMU files have 100% coverage.
  • Nix checks were not run because Nix is not installed.

Hardware tested on

Ryzen 5 5600X, ASUS ROG STRIX B550-I GAMING, Omarchy kernel 7.2.5-3-omarchy, ryzen_smu 0.1.7. The 5950X case uses simulated fuses.

0x0005D218 = 0x40C00000
0x0005D21C = 0x0000003F
0x30081D98 = 0x000003FF  physical CCD 0, all slots disabled
0x32081D98 = 0x0000030C  physical CCD 1, active slots 0, 1, 4, 5, 6, 7

Checklist

  • Regression tests added for the CCD mapping and simulated write addresses.
  • ruff check src/ and git diff --check pass.
  • Hardware mapping documented in docs/hardware.md with a source reference.
  • No AI context files tracked.
  • Complete Python unit suite passes outside the sandbox.
  • 100% total coverage gate passes locally. The same uncovered line exists on unmodified main.
  • Nix flake check. Nix is unavailable on this machine.

AI disclosure: This fix, its tests, and this PR description were produced by AI using GPT 6.1 with xhigh reasoning.

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