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mb/system76/ptl: Document GPIOs
Signed-off-by: Tim Crawford <tcrawford@system76.com>
1 parent f5c2f32 commit fc358cc

1 file changed

Lines changed: 108 additions & 100 deletions

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  • src/mainboard/system76/ptl/variants/lemp14

‎src/mainboard/system76/ptl/variants/lemp14/gpio.c‎

Lines changed: 108 additions & 100 deletions
Original file line numberDiff line numberDiff line change
@@ -4,75 +4,78 @@
44
#include <soc/gpio.h>
55

66
static const struct pad_config gpio_table[] = {
7-
PAD_CFG_NF(GPP_A00, NONE, DEEP, NF1),
8-
PAD_CFG_GPO(GPP_A01, 1, DEEP),
9-
PAD_CFG_GPO(GPP_A02, 1, DEEP),
10-
PAD_CFG_GPO(GPP_A03, 1, DEEP),
11-
PAD_CFG_GPO(GPP_A04, 1, DEEP),
12-
PAD_CFG_GPO(GPP_A05, 1, DEEP),
13-
PAD_CFG_GPO(GPP_A06, 1, DEEP),
7+
PAD_CFG_NF(GPP_A00, NONE, DEEP, NF1), // ESPI_IO0_EC
8+
PAD_CFG_GPO(GPP_A01, 1, DEEP), // ESPI_IO1_EC
9+
PAD_CFG_GPO(GPP_A02, 1, DEEP), // ESPI_IO2_EC
10+
PAD_CFG_GPO(GPP_A03, 1, DEEP), // ESPI_IO3_EC
11+
PAD_CFG_GPO(GPP_A04, 1, DEEP), // ESPI_CS_EC#
12+
PAD_CFG_GPO(GPP_A05, 1, DEEP), // ESPI_CLK_EC
13+
PAD_CFG_GPO(GPP_A06, 1, DEEP), // ESPI_RESET#
1414
PAD_CFG_GPO(GPP_A07, 1, DEEP),
15-
PAD_CFG_NF(GPP_A08, NONE, DEEP, NF1),
15+
PAD_CFG_NF(GPP_A08, NONE, DEEP, NF1), // SD_PWR_EN
1616
PAD_CFG_NF(GPP_A09, NONE, DEEP, NF1),
1717
PAD_CFG_NF(GPP_A10, UP_20K, DEEP, NF1),
18-
PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1),
19-
PAD_NC(GPP_A12, NATIVE),
20-
PAD_CFG_NF(GPP_A13, NATIVE, DEEP, NF2),
18+
PAD_CFG_NF(GPP_A11, UP_20K, DEEP, NF1), // WLAN_RST#
19+
PAD_NC(GPP_A12, NATIVE), // WLAN_WAKEUP#
20+
PAD_CFG_NF(GPP_A13, NATIVE, DEEP, NF2), // BODYSAR#
2121
_PAD_CFG_STRUCT(GPP_A14, 0x40001300, 0x3c00),
2222
PAD_CFG_NF(GPP_A15, UP_20K, DEEP, NF1),
23-
PAD_CFG_NF(GPP_A16, UP_20K, DEEP, NF1),
24-
PAD_CFG_NF(GPP_A17, UP_20K, DEEP, NF1),
25-
PAD_CFG_NF(GPP_B00, NONE, PWROK, NF1),
26-
PAD_CFG_NF(GPP_B01, NONE, PWROK, NF1),
23+
PAD_CFG_NF(GPP_A16, UP_20K, DEEP, NF1), // PCH_BT_EN
24+
PAD_CFG_NF(GPP_A17, UP_20K, DEEP, NF1), // WIFI_RF_EN
25+
26+
PAD_CFG_NF(GPP_B00, NONE, PWROK, NF1), // TBT_I2C_SCL
27+
PAD_CFG_NF(GPP_B01, NONE, PWROK, NF1), // TBT_I2C_SDA
2728
PAD_CFG_GPO(GPP_B02, 1, DEEP),
2829
PAD_CFG_GPO(GPP_B03, 1, DEEP),
29-
PAD_CFG_GPO(GPP_B04, 1, DEEP),
30+
PAD_CFG_GPO(GPP_B04, 1, DEEP), // strap
3031
PAD_CFG_GPO(GPP_B05, 1, DEEP),
31-
PAD_CFG_GPO(GPP_B06, 0, PLTRST),
32+
PAD_CFG_GPO(GPP_B06, 0, PLTRST), // ROM_I2C_EN
3233
PAD_CFG_GPO(GPP_B07, 1, DEEP),
3334
PAD_CFG_GPO(GPP_B08, 1, DEEP),
34-
PAD_CFG_GPO(GPP_B09, 1, PLTRST),
35-
PAD_CFG_GPO(GPP_B10, 1, PLTRST),
35+
PAD_CFG_GPO(GPP_B09, 1, PLTRST), // M2_SSD1_RST#
36+
PAD_CFG_GPO(GPP_B10, 1, PLTRST), // SSD1_PWR_EN
3637
PAD_NC(GPP_B11, NONE),
37-
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
38-
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
39-
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF2),
40-
PAD_NC(GPP_B15, NONE),
38+
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), // SLP_S0#
39+
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), // PLT_RST#
40+
PAD_CFG_NF(GPP_B14, NONE, DEEP, NF2), // CPU_HDMI_HPD
41+
PAD_NC(GPP_B15, NONE), // USB_OC3#
4142
PAD_CFG_GPO(GPP_B16, 1, DEEP),
42-
PAD_CFG_GPO(GPP_B17, 1, DEEP),
43+
PAD_CFG_GPO(GPP_B17, 1, DEEP), // HDMI_EN
4344
PAD_CFG_GPO(GPP_B18, 1, DEEP),
4445
PAD_CFG_GPO(GPP_B19, 1, DEEP),
45-
PAD_NC(GPP_B20, NONE),
46-
PAD_CFG_GPO(GPP_B21, 0, PLTRST),
46+
PAD_NC(GPP_B20, NONE), // LTE_RST_N
47+
PAD_CFG_GPO(GPP_B21, 0, PLTRST), // DG_FORCE_PWR
4748
PAD_CFG_GPO(GPP_B22, 1, DEEP),
48-
PAD_CFG_GPO(GPP_B23, 1, DEEP),
49+
PAD_CFG_GPO(GPP_B23, 1, DEEP), // strap
4950
PAD_CFG_GPO(GPP_B24, 1, DEEP),
5051
PAD_CFG_GPO(GPP_B25, 1, DEEP),
52+
5153
PAD_CFG_NF(GPP_C00, UP_20K, DEEP, NF1),
5254
PAD_CFG_NF(GPP_C01, UP_20K, DEEP, NF1),
53-
PAD_CFG_GPO(GPP_C02, 1, DEEP),
54-
PAD_CFG_NF(GPP_C03, NONE, DEEP, NF1),
55-
PAD_CFG_NF(GPP_C04, NONE, DEEP, NF1),
56-
PAD_CFG_GPO(GPP_C05, 1, DEEP),
55+
PAD_CFG_GPO(GPP_C02, 1, DEEP), // strap
56+
PAD_CFG_NF(GPP_C03, NONE, DEEP, NF1), // SML0_CLK
57+
PAD_CFG_NF(GPP_C04, NONE, DEEP, NF1), // SML0_DATA
58+
PAD_CFG_GPO(GPP_C05, 1, DEEP), // strap
5759
PAD_NC(GPP_C06, NONE),
5860
PAD_NC(GPP_C07, NONE),
5961
PAD_CFG_GPO(GPP_C08, 1, DEEP),
6062
PAD_CFG_GPO(GPP_C09, 1, DEEP),
6163
PAD_CFG_GPO(GPP_C10, 1, DEEP),
6264
PAD_CFG_GPO(GPP_C11, 1, DEEP),
63-
PAD_CFG_NF(GPP_C12, NONE, PLTRST, NF1),
64-
PAD_CFG_NF(GPP_C13, NONE, PLTRST, NF1),
65-
PAD_CFG_NF(GPP_C14, NONE, PLTRST, NF1),
66-
PAD_CFG_GPO(GPP_C15, 1, DEEP),
67-
//TODO PAD_CFG_NF(GPP_C16, NONE, TODO_0xc4000700, NF1),
68-
//TODO PAD_CFG_NF(GPP_C17, NONE, TODO_0xc4000700, NF1),
65+
PAD_CFG_NF(GPP_C12, NONE, PLTRST, NF1), // CARD_CLKREQ#_N
66+
PAD_CFG_NF(GPP_C13, NONE, PLTRST, NF1), // WLAN_CLKREQ#_N
67+
PAD_CFG_NF(GPP_C14, NONE, PLTRST, NF1), // 5G_PCIE_CLKREQ#_N
68+
PAD_CFG_GPO(GPP_C15, 1, DEEP), // strap
69+
//TODO PAD_CFG_NF(GPP_C16, NONE, TODO_0xc4000700, NF1), // TBTA_LSX0_TXD
70+
//TODO PAD_CFG_NF(GPP_C17, NONE, TODO_0xc4000700, NF1), // TBTA_LSX0_RXD
6971
PAD_CFG_GPO(GPP_C18, 1, DEEP),
7072
PAD_CFG_GPO(GPP_C19, 1, DEEP),
7173
PAD_CFG_GPO(GPP_C20, 1, DEEP),
7274
PAD_CFG_GPO(GPP_C21, 1, DEEP),
73-
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF2),
74-
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF2),
75-
PAD_CFG_GPO(GPP_D00, 1, PLTRST),
75+
PAD_CFG_NF(GPP_C22, NONE, DEEP, NF2), // HDMI_CTRLCLK
76+
PAD_CFG_NF(GPP_C23, NONE, DEEP, NF2), // HDMI_CTRLDATA
77+
78+
PAD_CFG_GPO(GPP_D00, 1, PLTRST), // SB_BLON
7679
PAD_CFG_GPO(GPP_D01, 1, DEEP),
7780
PAD_CFG_GPO(GPP_D02, 1, DEEP),
7881
PAD_CFG_GPO(GPP_D03, 1, DEEP),
@@ -82,118 +85,123 @@ static const struct pad_config gpio_table[] = {
8285
PAD_CFG_GPO(GPP_D07, 1, DEEP),
8386
PAD_CFG_GPO(GPP_D08, 1, DEEP),
8487
PAD_CFG_GPO(GPP_D09, 1, DEEP),
85-
PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1),
86-
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1),
87-
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1),
88-
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1),
88+
PAD_CFG_NF(GPP_D10, NONE, DEEP, NF1), // HDA_BITCLK
89+
PAD_CFG_NF(GPP_D11, NATIVE, DEEP, NF1), // HDA_SYNC
90+
PAD_CFG_NF(GPP_D12, NATIVE, DEEP, NF1), // HDA_SDOUT / strap
91+
PAD_CFG_NF(GPP_D13, NATIVE, DEEP, NF1), // HDA_SDIN0
8992
PAD_CFG_GPO(GPP_D14, 1, DEEP),
90-
PAD_NC(GPP_D15, NONE),
91-
PAD_CFG_NF(GPP_D16, NONE, DEEP, NF1),
93+
PAD_NC(GPP_D15, NONE), // CNVI_WAKE#
94+
PAD_CFG_NF(GPP_D16, NONE, DEEP, NF1), // HDA_RST#
9295
PAD_CFG_GPO(GPP_D17, 1, DEEP),
93-
PAD_CFG_NF(GPP_D18, NONE, PLTRST, NF1),
94-
PAD_CFG_GPO(GPP_D19, 1, PLTRST),
96+
PAD_CFG_NF(GPP_D18, NONE, PLTRST, NF1), // SSD1_CLKREQ#_N
97+
PAD_CFG_GPO(GPP_D19, 1, PLTRST), // SD_PCIE_RST_N
9598
PAD_CFG_GPO(GPP_D20, 1, DEEP),
9699
PAD_CFG_GPO(GPP_D21, 1, DEEP),
97100
PAD_CFG_NF(GPP_D22, NATIVE, DEEP, NF1),
98101
PAD_CFG_NF(GPP_D23, NATIVE, DEEP, NF1),
99102
PAD_CFG_GPO(GPP_D24, 1, DEEP),
100103
PAD_CFG_GPO(GPP_D25, 1, DEEP),
101-
_PAD_CFG_STRUCT(GPP_E01, 0x42880100, 0x0000),
102-
PAD_NC(GPP_E02, NONE),
104+
105+
_PAD_CFG_STRUCT(GPP_E01, 0x42880100, 0x0000), // TPM_PIRQ#
106+
PAD_NC(GPP_E02, NONE), // VRALERT#
103107
PAD_CFG_GPO(GPP_E03, 1, DEEP),
104108
PAD_CFG_GPO(GPP_E04, 1, DEEP),
105109
PAD_CFG_GPO(GPP_E05, 1, DEEP),
106-
PAD_CFG_GPO(GPP_E06, 1, DEEP),
110+
PAD_CFG_GPO(GPP_E06, 1, DEEP), // strap
107111
PAD_CFG_GPO(GPP_E07, 1, DEEP),
108-
PAD_NC(GPP_E08, NONE),
109-
PAD_NC(GPP_E09, NONE),
112+
PAD_NC(GPP_E08, NONE), // WAKE_ON_WWAN_N
113+
PAD_NC(GPP_E09, NONE), // USB_OC0#
110114
PAD_CFG_GPO(GPP_E10, 1, DEEP),
111-
PAD_CFG_GPI(GPP_E11, NONE, DEEP),
112-
_PAD_CFG_STRUCT(GPP_E12, 0x44002300, 0x0000),
113-
_PAD_CFG_STRUCT(GPP_E13, 0x44002300, 0x0000),
114-
PAD_CFG_GPI(GPP_E14, NONE, DEEP),
115-
PAD_CFG_GPI(GPP_E15, NONE, DEEP),
115+
PAD_CFG_GPI(GPP_E11, NONE, DEEP), // BOARD_ID1
116+
_PAD_CFG_STRUCT(GPP_E12, 0x44002300, 0x0000), // AMP_SMB_CLK
117+
_PAD_CFG_STRUCT(GPP_E13, 0x44002300, 0x0000), // AMP_SMB_DATA
118+
PAD_CFG_GPI(GPP_E14, NONE, DEEP), // BOARD_ID2
119+
PAD_CFG_GPI(GPP_E15, NONE, DEEP), // BOARD_ID3
116120
PAD_CFG_GPO(GPP_E16, 1, DEEP),
117-
PAD_CFG_GPI(GPP_E17, NONE, DEEP),
121+
PAD_CFG_GPI(GPP_E17, NONE, DEEP), // BOARD_ID4
118122
PAD_CFG_GPO(GPP_E18, 1, DEEP),
119123
PAD_CFG_GPO(GPP_E19, 1, DEEP),
120124
PAD_CFG_GPO(GPP_E20, 1, DEEP),
121-
PAD_CFG_NF(GPP_E21, NONE, PWROK, NF1),
125+
PAD_CFG_NF(GPP_E21, NONE, PWROK, NF1), // TBT_I2C_INT
122126
PAD_CFG_GPO(GPP_E22, 1, DEEP),
123-
PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1),
124-
PAD_CFG_NF(GPP_F01, UP_20K, DEEP, NF1),
125-
PAD_CFG_NF(GPP_F02, NONE, DEEP, NF1),
126-
PAD_CFG_NF(GPP_F03, UP_20K, DEEP, NF1),
127-
PAD_CFG_NF(GPP_F04, NONE, DEEP, NF1),
128-
PAD_CFG_NF(GPP_F05, NONE, DEEP, NF3),
129-
PAD_CFG_GPO(GPP_F06, 1, DEEP),
127+
128+
PAD_CFG_NF(GPP_F00, NONE, DEEP, NF1), // CNVI_BRI_DT
129+
PAD_CFG_NF(GPP_F01, UP_20K, DEEP, NF1), // CNVI_BRI_RSP
130+
PAD_CFG_NF(GPP_F02, NONE, DEEP, NF1), // CNVI_RGI_DT
131+
PAD_CFG_NF(GPP_F03, UP_20K, DEEP, NF1), // CNVI_RGI_RSP
132+
PAD_CFG_NF(GPP_F04, NONE, DEEP, NF1), // CNVI_RST#
133+
PAD_CFG_NF(GPP_F05, NONE, DEEP, NF3), // CNVI_CLKREQ
134+
PAD_CFG_GPO(GPP_F06, 1, DEEP), // CNVI_GNSS_PA_BLANKING
130135
PAD_CFG_GPO(GPP_F07, 1, DEEP),
131136
PAD_CFG_GPO(GPP_F08, 1, DEEP),
132-
PAD_CFG_GPI(GPP_F09, NONE, DEEP),
137+
PAD_CFG_GPI(GPP_F09, NONE, DEEP), // TPM_DET
133138
PAD_CFG_GPO(GPP_F10, 1, DEEP),
134139
PAD_CFG_GPO(GPP_F11, 1, DEEP),
135-
_PAD_CFG_STRUCT(GPP_F12, 0x44002300, 0x0000),
136-
_PAD_CFG_STRUCT(GPP_F13, 0x44002300, 0x0000),
140+
_PAD_CFG_STRUCT(GPP_F12, 0x44002300, 0x0000), // I2C_SCL_TP
141+
_PAD_CFG_STRUCT(GPP_F13, 0x44002300, 0x0000), // I2C_SDA_TP
137142
PAD_CFG_GPO(GPP_F14, 1, DEEP),
138143
PAD_CFG_GPO(GPP_F15, 1, DEEP),
139-
PAD_CFG_GPO(GPP_F16, 1, PLTRST),
144+
PAD_CFG_GPO(GPP_F16, 1, PLTRST), // CCD_WP#
140145
PAD_CFG_GPO(GPP_F17, 1, DEEP),
141-
_PAD_CFG_STRUCT(GPP_F18, 0x80800100, 0x0000),
142-
PAD_CFG_GPO(GPP_F19, 1, DEEP),
146+
_PAD_CFG_STRUCT(GPP_F18, 0x80800100, 0x0000), // TP_ATTN#_N
147+
PAD_CFG_GPO(GPP_F19, 1, DEEP), // strap
143148
PAD_CFG_GPO(GPP_F20, 1, DEEP),
144149
PAD_CFG_GPO(GPP_F21, 1, DEEP),
145150
PAD_CFG_GPO(GPP_F22, 1, DEEP),
146151
PAD_CFG_GPO(GPP_F23, 1, DEEP),
147-
PAD_CFG_NF(GPP_H00, NONE, DEEP, NF1),
148-
PAD_CFG_NF(GPP_H01, NONE, DEEP, NF1),
149-
PAD_CFG_NF(GPP_H02, NONE, DEEP, NF1),
150-
PAD_CFG_NF(GPP_H03, NONE, DEEP, NF1),
151-
PAD_CFG_NF(GPP_H04, NONE, DEEP, NF1),
152-
PAD_CFG_NF(GPP_H05, NONE, DEEP, NF1),
152+
153+
PAD_CFG_NF(GPP_H00, NONE, DEEP, NF1), // strap
154+
PAD_CFG_NF(GPP_H01, NONE, DEEP, NF1), // strap
155+
PAD_CFG_NF(GPP_H02, NONE, DEEP, NF1), // strap
156+
PAD_CFG_NF(GPP_H03, NONE, DEEP, NF1), // PCH_MUTE
157+
PAD_CFG_NF(GPP_H04, NONE, DEEP, NF1), // CNVI_MFUART2_RXD
158+
PAD_CFG_NF(GPP_H05, NONE, DEEP, NF1), // CNVI_MFUART2_TXD
153159
PAD_CFG_NF(GPP_H06, UP_20K, DEEP, NF1),
154160
PAD_CFG_NF(GPP_H07, NONE, DEEP, NF1),
155-
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1),
156-
PAD_CFG_NF(GPP_H09, UP_20K, DEEP, NF1),
161+
PAD_CFG_NF(GPP_H08, NONE, DEEP, NF1), // UART_RX
162+
PAD_CFG_NF(GPP_H09, UP_20K, DEEP, NF1), // UART_TX
157163
PAD_CFG_NF(GPP_H10, UP_20K, DEEP, NF1),
158164
PAD_CFG_NF(GPP_H11, DN_20K, DEEP, NF1),
159165
//TODO: PAD_CFG_NF(GPP_H12, TODO_0x2400, DEEP, NF1),
160-
PAD_CFG_NF(GPP_H13, DN_20K, DEEP, NF1),
166+
PAD_CFG_NF(GPP_H13, DN_20K, DEEP, NF1), // CPU_C10_GATE#
161167
PAD_CFG_NF(GPP_H14, NONE, DEEP, NF1),
162168
PAD_CFG_GPO(GPP_H15, 1, DEEP),
163169
PAD_CFG_GPO(GPP_H16, 1, DEEP),
164170
PAD_CFG_GPO(GPP_H17, 1, DEEP),
165171
PAD_NC(GPP_H18, NONE),
166172
_PAD_CFG_STRUCT(GPP_H19, 0x44000601, 0x0000),
167173
_PAD_CFG_STRUCT(GPP_H20, 0x44000601, 0x0000),
168-
PAD_CFG_GPO(GPP_H21, 1, DEEP),
169-
PAD_CFG_GPO(GPP_H22, 1, DEEP),
174+
PAD_CFG_GPO(GPP_H21, 1, DEEP), // PCH_I2C_SDA
175+
PAD_CFG_GPO(GPP_H22, 1, DEEP), // PCH_I2C_SCL
170176
PAD_NC(GPP_H23, NONE),
171177
PAD_NC(GPP_H24, NONE),
178+
172179
PAD_CFG_GPO(GPP_S00, 1, DEEP),
173180
PAD_CFG_GPO(GPP_S01, 1, DEEP),
174-
PAD_CFG_GPO(GPP_S02, 1, DEEP),
175-
PAD_CFG_GPO(GPP_S03, 1, DEEP),
176-
PAD_CFG_GPO(GPP_S04, 1, DEEP),
177-
PAD_CFG_GPO(GPP_S05, 1, DEEP),
178-
PAD_CFG_GPO(GPP_S06, 1, DEEP),
179-
PAD_CFG_GPO(GPP_S07, 1, DEEP),
181+
PAD_CFG_GPO(GPP_S02, 1, DEEP), // DMIC_CLK
182+
PAD_CFG_GPO(GPP_S03, 1, DEEP), // DMIC_DATA
183+
PAD_CFG_GPO(GPP_S04, 1, DEEP), // BT_PCMCLK
184+
PAD_CFG_GPO(GPP_S05, 1, DEEP), // BT_PCMFRM
185+
PAD_CFG_GPO(GPP_S06, 1, DEEP), // BT_PCMOUT
186+
PAD_CFG_GPO(GPP_S07, 1, DEEP), // BT_PCMIN
187+
180188
PAD_CFG_NF(GPP_V00, UP_20K, DEEP, NF1),
181-
PAD_CFG_NF(GPP_V01, NATIVE, DEEP, NF1),
182-
PAD_CFG_NF(GPP_V02, NATIVE, DEEP, NF1),
183-
PAD_CFG_NF(GPP_V03, UP_20K, DEEP, NF1),
184-
PAD_CFG_NF(GPP_V04, NONE, DEEP, NF1),
185-
PAD_CFG_NF(GPP_V05, NONE, DEEP, NF1),
186-
PAD_CFG_NF(GPP_V06, NONE, DEEP, NF1),
187-
PAD_CFG_NF(GPP_V07, NONE, DEEP, NF1),
188-
PAD_CFG_GPO(GPP_V08, 1, DEEP),
189+
PAD_CFG_NF(GPP_V01, NATIVE, DEEP, NF1), // AC_PRESENT
190+
PAD_CFG_NF(GPP_V02, NATIVE, DEEP, NF1), // SOC_WAKE#
191+
PAD_CFG_NF(GPP_V03, UP_20K, DEEP, NF1), // CPU_PWR_BTN#
192+
PAD_CFG_NF(GPP_V04, NONE, DEEP, NF1), // SUSB#_PCH
193+
PAD_CFG_NF(GPP_V05, NONE, DEEP, NF1), // SUSC#_PCH
194+
PAD_CFG_NF(GPP_V06, NONE, DEEP, NF1), // SLP_A#
195+
PAD_CFG_NF(GPP_V07, NONE, DEEP, NF1), // SUS_CLK
196+
PAD_CFG_GPO(GPP_V08, 1, DEEP), // SLP_WLAN#
189197
PAD_CFG_GPO(GPP_V09, 1, DEEP),
190198
PAD_CFG_GPO(GPP_V10, 1, DEEP),
191199
PAD_CFG_GPO(GPP_V11, 1, DEEP),
192-
PAD_CFG_NF(GPP_V12, NONE, DEEP, NF1),
200+
PAD_CFG_NF(GPP_V12, NONE, DEEP, NF1), // PCH_WAKE#
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_PAD_CFG_STRUCT(GPP_V13, 0x44000601, 0x0000),
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_PAD_CFG_STRUCT(GPP_V14, 0x44000601, 0x0000),
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_PAD_CFG_STRUCT(GPP_V15, 0x44000601, 0x0000),
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PAD_CFG_NF(GPP_V16, NONE, DEEP, NF1),
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PAD_CFG_NF(GPP_V16, NONE, DEEP, NF1), // VCCST_EN
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PAD_CFG_GPO(GPP_V17, 1, DEEP),
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};
199207

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