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fpistmfpistm
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Merge pull request #1393 from fpistm/H7_clock
fix: generic H7: clock configuration
2 parents 6555870 + 3c47c68 commit 6ff7638

5 files changed

Lines changed: 116 additions & 15 deletions

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‎libraries/SPI/src/utility/spi_com.c‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,27 @@ uint32_t spi_getClkFreqInst(SPI_TypeDef *spi_inst)
6060
UNUSED(spi_inst);
6161
/* SPIx source CLK is PCKL1 */
6262
spi_freq = HAL_RCC_GetPCLK1Freq();
63+
#elif defined(STM32H7xx)
64+
/* Get source clock depending on SPI instance */
65+
if (spi_inst != NP) {
66+
switch ((uint32_t)spi_inst) {
67+
case (uint32_t)SPI1:
68+
case (uint32_t)SPI2:
69+
case (uint32_t)SPI3:
70+
spi_freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI123);
71+
break;
72+
case (uint32_t)SPI4:
73+
case (uint32_t)SPI5:
74+
spi_freq = HAL_RCC_GetPCLK2Freq();
75+
break;
76+
case (uint32_t)SPI6:
77+
spi_freq = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SPI6);
78+
break;
79+
default:
80+
core_debug("CLK: SPI instance not set");
81+
break;
82+
}
83+
}
6384
#elif defined(STM32MP1xx)
6485
/* Get source clock depending on SPI instance */
6586
if (spi_inst != NP) {

‎variants/STM32H7xx/H742V(G-I)(H-T)_H743V(G-I)(H-T)_H750VBT_H753VI(H-T)/generic_clock.c‎

Lines changed: 25 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ WEAK void SystemClock_Config(void)
4949
RCC_OscInitStruct.PLL.PLLM = 4;
5050
RCC_OscInitStruct.PLL.PLLN = 60;
5151
RCC_OscInitStruct.PLL.PLLP = 2;
52-
RCC_OscInitStruct.PLL.PLLQ = 4;
52+
RCC_OscInitStruct.PLL.PLLQ = 5;
5353
RCC_OscInitStruct.PLL.PLLR = 2;
5454
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
5555
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
@@ -73,10 +73,32 @@ WEAK void SystemClock_Config(void)
7373
Error_Handler();
7474
}
7575

76-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_QSPI | RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_USB;
76+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI
77+
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
78+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
79+
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
80+
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
81+
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
82+
PeriphClkInitStruct.PLL2.PLL2M = 4;
83+
PeriphClkInitStruct.PLL2.PLL2N = 10;
84+
PeriphClkInitStruct.PLL2.PLL2P = 2;
85+
PeriphClkInitStruct.PLL2.PLL2Q = 2;
86+
PeriphClkInitStruct.PLL2.PLL2R = 2;
87+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
88+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
89+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
90+
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
91+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
7792
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
7893
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
79-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
94+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1;
95+
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
96+
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
97+
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1;
98+
PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_D3PCLK1;
99+
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
100+
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1;
101+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1;
80102
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
81103
Error_Handler();
82104
}

‎variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/generic_clock.c‎

Lines changed: 27 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -47,9 +47,9 @@ WEAK void SystemClock_Config(void)
4747
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
4848
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
4949
RCC_OscInitStruct.PLL.PLLM = 4;
50-
RCC_OscInitStruct.PLL.PLLN = 30;
50+
RCC_OscInitStruct.PLL.PLLN = 60;
5151
RCC_OscInitStruct.PLL.PLLP = 2;
52-
RCC_OscInitStruct.PLL.PLLQ = 2;
52+
RCC_OscInitStruct.PLL.PLLQ = 5;
5353
RCC_OscInitStruct.PLL.PLLR = 2;
5454
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
5555
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
@@ -75,8 +75,32 @@ WEAK void SystemClock_Config(void)
7575
}
7676
/** Initializes the peripherals clock
7777
*/
78-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
78+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI
79+
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
80+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
81+
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
82+
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
83+
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
84+
PeriphClkInitStruct.PLL2.PLL2M = 4;
85+
PeriphClkInitStruct.PLL2.PLL2N = 10;
86+
PeriphClkInitStruct.PLL2.PLL2P = 2;
87+
PeriphClkInitStruct.PLL2.PLL2Q = 2;
88+
PeriphClkInitStruct.PLL2.PLL2R = 2;
89+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
90+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
91+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
92+
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
7993
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
94+
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
95+
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
96+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1;
97+
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
98+
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
99+
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1;
100+
PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_D3PCLK1;
101+
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
102+
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1;
103+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1;
80104
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
81105
Error_Handler();
82106
}

‎variants/STM32H7xx/H742Z(G-I)T_H743Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/variant_NUCLEO_H743ZI.cpp‎

Lines changed: 19 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -358,21 +358,33 @@ WEAK void SystemClock_Config(void)
358358
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
359359
Error_Handler();
360360
}
361-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
362-
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI
363-
| RCC_PERIPHCLK_SDMMC;
361+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI
362+
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
363+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
364+
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
365+
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
366+
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
367+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
364368
PeriphClkInitStruct.PLL2.PLL2M = 1;
365-
PeriphClkInitStruct.PLL2.PLL2N = 18;
369+
PeriphClkInitStruct.PLL2.PLL2N = 20;
366370
PeriphClkInitStruct.PLL2.PLL2P = 2;
367371
PeriphClkInitStruct.PLL2.PLL2Q = 2;
368372
PeriphClkInitStruct.PLL2.PLL2R = 2;
369373
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
370374
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
371-
PeriphClkInitStruct.PLL2.PLL2FRACN = 6144.0;
375+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
376+
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
377+
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
372378
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
373379
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
374-
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
375-
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
380+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1;
381+
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
382+
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
383+
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1;
384+
PeriphClkInitStruct.I2c4ClockSelection = RCC_I2C4CLKSOURCE_D3PCLK1;
385+
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
386+
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1;
387+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1;
376388
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
377389
Error_Handler();
378390
}

‎variants/STM32H7xx/H743I(G-I)(K-T)_H750IBK_H753II(K-T)/generic_clock.c‎

Lines changed: 24 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ WEAK void SystemClock_Config(void)
4747
RCC_OscInitStruct.PLL.PLLM = 4;
4848
RCC_OscInitStruct.PLL.PLLN = 60;
4949
RCC_OscInitStruct.PLL.PLLP = 2;
50-
RCC_OscInitStruct.PLL.PLLQ = 4;
50+
RCC_OscInitStruct.PLL.PLLQ = 5;
5151
RCC_OscInitStruct.PLL.PLLR = 2;
5252
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
5353
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
@@ -73,8 +73,30 @@ WEAK void SystemClock_Config(void)
7373
}
7474
/** Initializes the peripherals clock
7575
*/
76-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
76+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_QSPI
77+
| RCC_PERIPHCLK_SDMMC | RCC_PERIPHCLK_ADC
78+
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_USART16
79+
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
80+
| RCC_PERIPHCLK_SPI123 | RCC_PERIPHCLK_SPI45
81+
| RCC_PERIPHCLK_SPI6;
82+
PeriphClkInitStruct.PLL2.PLL2M = 4;
83+
PeriphClkInitStruct.PLL2.PLL2N = 10;
84+
PeriphClkInitStruct.PLL2.PLL2P = 2;
85+
PeriphClkInitStruct.PLL2.PLL2Q = 2;
86+
PeriphClkInitStruct.PLL2.PLL2R = 2;
87+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
88+
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
89+
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
7790
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
91+
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
92+
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
93+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1;
94+
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
95+
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
96+
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1;
97+
PeriphClkInitStruct.Spi123ClockSelection = RCC_SPI123CLKSOURCE_PLL;
98+
PeriphClkInitStruct.Spi45ClockSelection = RCC_SPI45CLKSOURCE_D2PCLK1;
99+
PeriphClkInitStruct.Spi6ClockSelection = RCC_SPI6CLKSOURCE_D3PCLK1;
78100
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
79101
Error_Handler();
80102
}

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