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Update HAL from STM32CubeF4 V1.16.0
Signed-off-by: Frederic.Pillon <frederic.pillon@st.com>
1 parent e9d8608 commit 18faab6

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Lines changed: 70505 additions & 11851 deletions

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‎system/Drivers/STM32F4xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 127 additions & 75 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32_assert_template.h‎

Lines changed: 75 additions & 0 deletions
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@@ -0,0 +1,75 @@
1+
/**
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******************************************************************************
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* @file stm32_assert.h
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* @author MCD Application Team
5+
* @version V1.7.1
6+
* @date 14-April-2017
7+
* @brief STM32 assert template file.
8+
* This file should be copied to the application folder and renamed
9+
* to stm32_assert.h.
10+
******************************************************************************
11+
* @attention
12+
*
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* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
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*
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* Redistribution and use in source and binary forms, with or without modification,
16+
* are permitted provided that the following conditions are met:
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
19+
* 2. Redistributions in binary form must reproduce the above copyright notice,
20+
* this list of conditions and the following disclaimer in the documentation
21+
* and/or other materials provided with the distribution.
22+
* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
29+
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
30+
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
33+
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
34+
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36+
*
37+
******************************************************************************
38+
*/
39+
40+
/* Define to prevent recursive inclusion -------------------------------------*/
41+
#ifndef __STM32_ASSERT_H
42+
#define __STM32_ASSERT_H
43+
44+
#ifdef __cplusplus
45+
extern "C" {
46+
#endif
47+
48+
/* Exported types ------------------------------------------------------------*/
49+
/* Exported constants --------------------------------------------------------*/
50+
/* Includes ------------------------------------------------------------------*/
51+
/* Exported macro ------------------------------------------------------------*/
52+
#ifdef USE_FULL_ASSERT
53+
/**
54+
* @brief The assert_param macro is used for function's parameters check.
55+
* @param expr: If expr is false, it calls assert_failed function
56+
* which reports the name of the source file and the source
57+
* line number of the call that failed.
58+
* If expr is true, it returns no value.
59+
* @retval None
60+
*/
61+
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
62+
/* Exported functions ------------------------------------------------------- */
63+
void assert_failed(uint8_t* file, uint32_t line);
64+
#else
65+
#define assert_param(expr) ((void)0U)
66+
#endif /* USE_FULL_ASSERT */
67+
68+
#ifdef __cplusplus
69+
}
70+
#endif
71+
72+
#endif /* __STM32_ASSERT_H */
73+
74+
75+
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal.h‎

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2,14 +2,14 @@
22
******************************************************************************
33
* @file stm32f4xx_hal.h
44
* @author MCD Application Team
5-
* @version V1.6.0
6-
* @date 04-November-2016
5+
* @version V1.7.1
6+
* @date 14-April-2017
77
* @brief This file contains all the functions prototypes for the HAL
88
* module driver.
99
******************************************************************************
1010
* @attention
1111
*
12-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
12+
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
1313
*
1414
* Redistribution and use in source and binary forms, with or without modification,
1515
* are permitted provided that the following conditions are met:
@@ -164,7 +164,7 @@
164164
/**
165165
* @}
166166
*/
167-
167+
168168
/** @defgroup PVD_Lock_Enable PVD Lock
169169
* @{
170170
*/
@@ -220,6 +220,7 @@ void HAL_DBGMCU_EnableDBGStandbyMode(void);
220220
void HAL_DBGMCU_DisableDBGStandbyMode(void);
221221
void HAL_EnableCompensationCell(void);
222222
void HAL_DisableCompensationCell(void);
223+
void HAL_GetUID(uint32_t *UID);
223224
#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) ||\
224225
defined(STM32F469xx) || defined(STM32F479xx)
225226
void HAL_EnableMemorySwappingBank(void);

‎system/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_adc.h‎

Lines changed: 51 additions & 51 deletions
Original file line numberDiff line numberDiff line change
@@ -2,13 +2,13 @@
22
******************************************************************************
33
* @file stm32f4xx_hal_adc.h
44
* @author MCD Application Team
5-
* @version V1.6.0
6-
* @date 04-November-2016
5+
* @version V1.7.1
6+
* @date 14-April-2017
77
* @brief Header file containing functions prototypes of ADC HAL library.
88
******************************************************************************
99
* @attention
1010
*
11-
* <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
11+
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
1212
*
1313
* Redistribution and use in source and binary forms, with or without modification,
1414
* are permitted provided that the following conditions are met:
@@ -172,34 +172,34 @@ typedef struct
172172
* @brief HAL ADC state machine: ADC states definition (bitfields)
173173
*/
174174
/* States of ADC global scope */
175-
#define HAL_ADC_STATE_RESET ((uint32_t)0x00000000U) /*!< ADC not yet initialized or disabled */
176-
#define HAL_ADC_STATE_READY ((uint32_t)0x00000001U) /*!< ADC peripheral ready for use */
177-
#define HAL_ADC_STATE_BUSY_INTERNAL ((uint32_t)0x00000002U) /*!< ADC is busy to internal process (initialization, calibration) */
178-
#define HAL_ADC_STATE_TIMEOUT ((uint32_t)0x00000004U) /*!< TimeOut occurrence */
175+
#define HAL_ADC_STATE_RESET 0x00000000U /*!< ADC not yet initialized or disabled */
176+
#define HAL_ADC_STATE_READY 0x00000001U /*!< ADC peripheral ready for use */
177+
#define HAL_ADC_STATE_BUSY_INTERNAL 0x00000002U /*!< ADC is busy to internal process (initialization, calibration) */
178+
#define HAL_ADC_STATE_TIMEOUT 0x00000004U /*!< TimeOut occurrence */
179179

180180
/* States of ADC errors */
181-
#define HAL_ADC_STATE_ERROR_INTERNAL ((uint32_t)0x00000010U) /*!< Internal error occurrence */
182-
#define HAL_ADC_STATE_ERROR_CONFIG ((uint32_t)0x00000020U) /*!< Configuration error occurrence */
183-
#define HAL_ADC_STATE_ERROR_DMA ((uint32_t)0x00000040U) /*!< DMA error occurrence */
181+
#define HAL_ADC_STATE_ERROR_INTERNAL 0x00000010U /*!< Internal error occurrence */
182+
#define HAL_ADC_STATE_ERROR_CONFIG 0x00000020U /*!< Configuration error occurrence */
183+
#define HAL_ADC_STATE_ERROR_DMA 0x00000040U /*!< DMA error occurrence */
184184

185185
/* States of ADC group regular */
186-
#define HAL_ADC_STATE_REG_BUSY ((uint32_t)0x00000100U) /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
187-
external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
188-
#define HAL_ADC_STATE_REG_EOC ((uint32_t)0x00000200U) /*!< Conversion data available on group regular */
189-
#define HAL_ADC_STATE_REG_OVR ((uint32_t)0x00000400U) /*!< Overrun occurrence */
186+
#define HAL_ADC_STATE_REG_BUSY 0x00000100U /*!< A conversion on group regular is ongoing or can occur (either by continuous mode,
187+
external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
188+
#define HAL_ADC_STATE_REG_EOC 0x00000200U /*!< Conversion data available on group regular */
189+
#define HAL_ADC_STATE_REG_OVR 0x00000400U /*!< Overrun occurrence */
190190

191191
/* States of ADC group injected */
192-
#define HAL_ADC_STATE_INJ_BUSY ((uint32_t)0x00001000U) /*!< A conversion on group injected is ongoing or can occur (either by auto-injection mode,
193-
external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
194-
#define HAL_ADC_STATE_INJ_EOC ((uint32_t)0x00002000U) /*!< Conversion data available on group injected */
192+
#define HAL_ADC_STATE_INJ_BUSY 0x00001000U /*!< A conversion on group injected is ongoing or can occur (either by auto-injection mode,
193+
external trigger, low power auto power-on (if feature available), multimode ADC master control (if feature available)) */
194+
#define HAL_ADC_STATE_INJ_EOC 0x00002000U /*!< Conversion data available on group injected */
195195

196196
/* States of ADC analog watchdogs */
197-
#define HAL_ADC_STATE_AWD1 ((uint32_t)0x00010000U) /*!< Out-of-window occurrence of analog watchdog 1 */
198-
#define HAL_ADC_STATE_AWD2 ((uint32_t)0x00020000U) /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 2 */
199-
#define HAL_ADC_STATE_AWD3 ((uint32_t)0x00040000U) /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 3 */
197+
#define HAL_ADC_STATE_AWD1 0x00010000U /*!< Out-of-window occurrence of analog watchdog 1 */
198+
#define HAL_ADC_STATE_AWD2 0x00020000U /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 2 */
199+
#define HAL_ADC_STATE_AWD3 0x00040000U /*!< Not available on STM32F4 device: Out-of-window occurrence of analog watchdog 3 */
200200

201201
/* States of ADC multi-mode */
202-
#define HAL_ADC_STATE_MULTIMODE_SLAVE ((uint32_t)0x00100000U) /*!< Not available on STM32F4 device: ADC in multimode slave state, controlled by another ADC master ( */
202+
#define HAL_ADC_STATE_MULTIMODE_SLAVE 0x00100000U /*!< Not available on STM32F4 device: ADC in multimode slave state, controlled by another ADC master ( */
203203

204204

205205
/**
@@ -233,11 +233,11 @@ typedef struct
233233
/** @defgroup ADC_Error_Code ADC Error Code
234234
* @{
235235
*/
236-
#define HAL_ADC_ERROR_NONE ((uint32_t)0x00U) /*!< No error */
237-
#define HAL_ADC_ERROR_INTERNAL ((uint32_t)0x01U) /*!< ADC IP internal error: if problem of clocking,
238-
enable/disable, erroneous state */
239-
#define HAL_ADC_ERROR_OVR ((uint32_t)0x02U) /*!< Overrun error */
240-
#define HAL_ADC_ERROR_DMA ((uint32_t)0x04U) /*!< DMA transfer error */
236+
#define HAL_ADC_ERROR_NONE 0x00U /*!< No error */
237+
#define HAL_ADC_ERROR_INTERNAL 0x01U /*!< ADC IP internal error: if problem of clocking,
238+
enable/disable, erroneous state */
239+
#define HAL_ADC_ERROR_OVR 0x02U /*!< Overrun error */
240+
#define HAL_ADC_ERROR_DMA 0x04U /*!< DMA transfer error */
241241
/**
242242
* @}
243243
*/
@@ -246,7 +246,7 @@ typedef struct
246246
/** @defgroup ADC_ClockPrescaler ADC Clock Prescaler
247247
* @{
248248
*/
249-
#define ADC_CLOCK_SYNC_PCLK_DIV2 ((uint32_t)0x00000000U)
249+
#define ADC_CLOCK_SYNC_PCLK_DIV2 0x00000000U
250250
#define ADC_CLOCK_SYNC_PCLK_DIV4 ((uint32_t)ADC_CCR_ADCPRE_0)
251251
#define ADC_CLOCK_SYNC_PCLK_DIV6 ((uint32_t)ADC_CCR_ADCPRE_1)
252252
#define ADC_CLOCK_SYNC_PCLK_DIV8 ((uint32_t)ADC_CCR_ADCPRE)
@@ -257,7 +257,7 @@ typedef struct
257257
/** @defgroup ADC_delay_between_2_sampling_phases ADC Delay Between 2 Sampling Phases
258258
* @{
259259
*/
260-
#define ADC_TWOSAMPLINGDELAY_5CYCLES ((uint32_t)0x00000000U)
260+
#define ADC_TWOSAMPLINGDELAY_5CYCLES 0x00000000U
261261
#define ADC_TWOSAMPLINGDELAY_6CYCLES ((uint32_t)ADC_CCR_DELAY_0)
262262
#define ADC_TWOSAMPLINGDELAY_7CYCLES ((uint32_t)ADC_CCR_DELAY_1)
263263
#define ADC_TWOSAMPLINGDELAY_8CYCLES ((uint32_t)(ADC_CCR_DELAY_1 | ADC_CCR_DELAY_0))
@@ -280,7 +280,7 @@ typedef struct
280280
/** @defgroup ADC_Resolution ADC Resolution
281281
* @{
282282
*/
283-
#define ADC_RESOLUTION_12B ((uint32_t)0x00000000U)
283+
#define ADC_RESOLUTION_12B 0x00000000U
284284
#define ADC_RESOLUTION_10B ((uint32_t)ADC_CR1_RES_0)
285285
#define ADC_RESOLUTION_8B ((uint32_t)ADC_CR1_RES_1)
286286
#define ADC_RESOLUTION_6B ((uint32_t)ADC_CR1_RES)
@@ -291,7 +291,7 @@ typedef struct
291291
/** @defgroup ADC_External_trigger_edge_Regular ADC External Trigger Edge Regular
292292
* @{
293293
*/
294-
#define ADC_EXTERNALTRIGCONVEDGE_NONE ((uint32_t)0x00000000U)
294+
#define ADC_EXTERNALTRIGCONVEDGE_NONE 0x00000000U
295295
#define ADC_EXTERNALTRIGCONVEDGE_RISING ((uint32_t)ADC_CR2_EXTEN_0)
296296
#define ADC_EXTERNALTRIGCONVEDGE_FALLING ((uint32_t)ADC_CR2_EXTEN_1)
297297
#define ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_EXTEN)
@@ -304,7 +304,7 @@ typedef struct
304304
*/
305305
/* Note: Parameter ADC_SOFTWARE_START is a software parameter used for */
306306
/* compatibility with other STM32 devices. */
307-
#define ADC_EXTERNALTRIGCONV_T1_CC1 ((uint32_t)0x00000000U)
307+
#define ADC_EXTERNALTRIGCONV_T1_CC1 0x00000000U
308308
#define ADC_EXTERNALTRIGCONV_T1_CC2 ((uint32_t)ADC_CR2_EXTSEL_0)
309309
#define ADC_EXTERNALTRIGCONV_T1_CC3 ((uint32_t)ADC_CR2_EXTSEL_1)
310310
#define ADC_EXTERNALTRIGCONV_T2_CC2 ((uint32_t)(ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0))
@@ -328,7 +328,7 @@ typedef struct
328328
/** @defgroup ADC_Data_align ADC Data Align
329329
* @{
330330
*/
331-
#define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000U)
331+
#define ADC_DATAALIGN_RIGHT 0x00000000U
332332
#define ADC_DATAALIGN_LEFT ((uint32_t)ADC_CR2_ALIGN)
333333
/**
334334
* @}
@@ -337,7 +337,7 @@ typedef struct
337337
/** @defgroup ADC_channels ADC Common Channels
338338
* @{
339339
*/
340-
#define ADC_CHANNEL_0 ((uint32_t)0x00000000U)
340+
#define ADC_CHANNEL_0 0x00000000U
341341
#define ADC_CHANNEL_1 ((uint32_t)ADC_CR1_AWDCH_0)
342342
#define ADC_CHANNEL_2 ((uint32_t)ADC_CR1_AWDCH_1)
343343
#define ADC_CHANNEL_3 ((uint32_t)(ADC_CR1_AWDCH_1 | ADC_CR1_AWDCH_0))
@@ -366,7 +366,7 @@ typedef struct
366366
/** @defgroup ADC_sampling_times ADC Sampling Times
367367
* @{
368368
*/
369-
#define ADC_SAMPLETIME_3CYCLES ((uint32_t)0x00000000U)
369+
#define ADC_SAMPLETIME_3CYCLES 0x00000000U
370370
#define ADC_SAMPLETIME_15CYCLES ((uint32_t)ADC_SMPR1_SMP10_0)
371371
#define ADC_SAMPLETIME_28CYCLES ((uint32_t)ADC_SMPR1_SMP10_1)
372372
#define ADC_SAMPLETIME_56CYCLES ((uint32_t)(ADC_SMPR1_SMP10_1 | ADC_SMPR1_SMP10_0))
@@ -381,9 +381,9 @@ typedef struct
381381
/** @defgroup ADC_EOCSelection ADC EOC Selection
382382
* @{
383383
*/
384-
#define ADC_EOC_SEQ_CONV ((uint32_t)0x00000000U)
385-
#define ADC_EOC_SINGLE_CONV ((uint32_t)0x00000001U)
386-
#define ADC_EOC_SINGLE_SEQ_CONV ((uint32_t)0x00000002U) /*!< reserved for future use */
384+
#define ADC_EOC_SEQ_CONV 0x00000000U
385+
#define ADC_EOC_SINGLE_CONV 0x00000001U
386+
#define ADC_EOC_SINGLE_SEQ_CONV 0x00000002U /*!< reserved for future use */
387387
/**
388388
* @}
389389
*/
@@ -406,7 +406,7 @@ typedef struct
406406
#define ADC_ANALOGWATCHDOG_ALL_REG ((uint32_t)ADC_CR1_AWDEN)
407407
#define ADC_ANALOGWATCHDOG_ALL_INJEC ((uint32_t)ADC_CR1_JAWDEN)
408408
#define ADC_ANALOGWATCHDOG_ALL_REGINJEC ((uint32_t)(ADC_CR1_AWDEN | ADC_CR1_JAWDEN))
409-
#define ADC_ANALOGWATCHDOG_NONE ((uint32_t)0x00000000U)
409+
#define ADC_ANALOGWATCHDOG_NONE 0x00000000U
410410
/**
411411
* @}
412412
*/
@@ -438,9 +438,9 @@ typedef struct
438438
/** @defgroup ADC_channels_type ADC Channels Type
439439
* @{
440440
*/
441-
#define ADC_ALL_CHANNELS ((uint32_t)0x00000001U)
442-
#define ADC_REGULAR_CHANNELS ((uint32_t)0x00000002U) /*!< reserved for future use */
443-
#define ADC_INJECTED_CHANNELS ((uint32_t)0x00000003U) /*!< reserved for future use */
441+
#define ADC_ALL_CHANNELS 0x00000001U
442+
#define ADC_REGULAR_CHANNELS 0x00000002U /*!< reserved for future use */
443+
#define ADC_INJECTED_CHANNELS 0x00000003U /*!< reserved for future use */
444444
/**
445445
* @}
446446
*/
@@ -597,11 +597,11 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
597597
/* Delay for ADC stabilization time. */
598598
/* Maximum delay is 1us (refer to device datasheet, parameter tSTAB). */
599599
/* Unit: us */
600-
#define ADC_STAB_DELAY_US ((uint32_t) 3U)
600+
#define ADC_STAB_DELAY_US 3U
601601
/* Delay for temperature sensor stabilization time. */
602602
/* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
603603
/* Unit: us */
604-
#define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10U)
604+
#define ADC_TEMPSENSOR_DELAY_US 10U
605605
/**
606606
* @}
607607
*/
@@ -729,16 +729,16 @@ uint32_t HAL_ADC_GetError(ADC_HandleTypeDef *hadc);
729729
#define IS_ADC_CHANNELS_TYPE(CHANNEL_TYPE) (((CHANNEL_TYPE) == ADC_ALL_CHANNELS) || \
730730
((CHANNEL_TYPE) == ADC_REGULAR_CHANNELS) || \
731731
((CHANNEL_TYPE) == ADC_INJECTED_CHANNELS))
732-
#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= ((uint32_t)0xFFFU))
732+
#define IS_ADC_THRESHOLD(THRESHOLD) ((THRESHOLD) <= 0xFFFU)
733733

734-
#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1U)) && ((LENGTH) <= ((uint32_t)16U)))
735-
#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= ((uint32_t)1U)) && ((RANK) <= ((uint32_t)16U)))
736-
#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= ((uint32_t)1U)) && ((NUMBER) <= ((uint32_t)8U)))
734+
#define IS_ADC_REGULAR_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 16U))
735+
#define IS_ADC_REGULAR_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= (16U)))
736+
#define IS_ADC_REGULAR_DISC_NUMBER(NUMBER) (((NUMBER) >= 1U) && ((NUMBER) <= 8U))
737737
#define IS_ADC_RANGE(RESOLUTION, ADC_VALUE) \
738-
((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= ((uint32_t)0x0FFFU))) || \
739-
(((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= ((uint32_t)0x03FFU))) || \
740-
(((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= ((uint32_t)0x00FFU))) || \
741-
(((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= ((uint32_t)0x003FU))))
738+
((((RESOLUTION) == ADC_RESOLUTION_12B) && ((ADC_VALUE) <= 0x0FFFU)) || \
739+
(((RESOLUTION) == ADC_RESOLUTION_10B) && ((ADC_VALUE) <= 0x03FFU)) || \
740+
(((RESOLUTION) == ADC_RESOLUTION_8B) && ((ADC_VALUE) <= 0x00FFU)) || \
741+
(((RESOLUTION) == ADC_RESOLUTION_6B) && ((ADC_VALUE) <= 0x003FU)))
742742

743743
/**
744744
* @brief Set ADC Regular channel sequence length.

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