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e2k-lcc: Avoid use of missing _mm256_loadu2_*/_mm256_storeu2_*
1 parent 532e7b0 commit 0b4ee01

2 files changed

Lines changed: 7 additions & 6 deletions

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simde/simde-arch.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -190,6 +190,7 @@
190190
#define SIMDE_BUG_LCC_TOO_STRICT_VECTOR_SHIFTS_AND_COMPARES
191191
#define SIMDE_BUG_LCC_XOP_MISSING
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#define SIMDE_BUG_LCC_FMA_WRONG_RESULT
193+
#define SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2
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#endif
194195

195196
/* HP/PA / PA-RISC

simde/x86/avx.h

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3935,7 +3935,7 @@ simde_mm256_loadu_si256 (void const * mem_addr) {
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SIMDE_FUNCTION_ATTRIBUTES
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simde__m256
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simde_mm256_loadu2_m128 (const float hiaddr[HEDLEY_ARRAY_PARAM(4)], const float loaddr[HEDLEY_ARRAY_PARAM(4)]) {
3938-
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341)
3938+
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2)
39393939
return _mm256_loadu2_m128(hiaddr, loaddr);
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#else
39413941
return
@@ -3951,7 +3951,7 @@ simde_mm256_loadu2_m128 (const float hiaddr[HEDLEY_ARRAY_PARAM(4)], const float
39513951
SIMDE_FUNCTION_ATTRIBUTES
39523952
simde__m256d
39533953
simde_mm256_loadu2_m128d (const double hiaddr[HEDLEY_ARRAY_PARAM(2)], const double loaddr[HEDLEY_ARRAY_PARAM(2)]) {
3954-
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341)
3954+
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2)
39553955
return _mm256_loadu2_m128d(hiaddr, loaddr);
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#else
39573957
return
@@ -3967,7 +3967,7 @@ simde_mm256_loadu2_m128d (const double hiaddr[HEDLEY_ARRAY_PARAM(2)], const doub
39673967
SIMDE_FUNCTION_ATTRIBUTES
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simde__m256i
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simde_mm256_loadu2_m128i (const simde__m128i* hiaddr, const simde__m128i* loaddr) {
3970-
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341)
3970+
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2)
39713971
return _mm256_loadu2_m128i(hiaddr, loaddr);
39723972
#else
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return
@@ -5230,7 +5230,7 @@ simde_mm256_storeu_si256 (void* mem_addr, simde__m256i a) {
52305230
SIMDE_FUNCTION_ATTRIBUTES
52315231
void
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simde_mm256_storeu2_m128 (simde_float32 hi_addr[4], simde_float32 lo_addr[4], simde__m256 a) {
5233-
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341)
5233+
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2)
52345234
_mm256_storeu2_m128(hi_addr, lo_addr, a);
52355235
#else
52365236
simde_mm_storeu_ps(lo_addr, simde_mm256_castps256_ps128(a));
@@ -5245,7 +5245,7 @@ simde_mm256_storeu2_m128 (simde_float32 hi_addr[4], simde_float32 lo_addr[4], si
52455245
SIMDE_FUNCTION_ATTRIBUTES
52465246
void
52475247
simde_mm256_storeu2_m128d (simde_float64 hi_addr[2], simde_float64 lo_addr[2], simde__m256d a) {
5248-
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341)
5248+
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2)
52495249
_mm256_storeu2_m128d(hi_addr, lo_addr, a);
52505250
#else
52515251
simde_mm_storeu_pd(lo_addr, simde_mm256_castpd256_pd128(a));
@@ -5260,7 +5260,7 @@ simde_mm256_storeu2_m128d (simde_float64 hi_addr[2], simde_float64 lo_addr[2], s
52605260
SIMDE_FUNCTION_ATTRIBUTES
52615261
void
52625262
simde_mm256_storeu2_m128i (simde__m128i* hi_addr, simde__m128i* lo_addr, simde__m256i a) {
5263-
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341)
5263+
#if defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_BUG_GCC_91341) && !defined(SIMDE_BUG_LCC_AVX_NO_LOAD_STORE_U2)
52645264
_mm256_storeu2_m128i(hi_addr, lo_addr, a);
52655265
#else
52665266
simde_mm_storeu_si128(lo_addr, simde_mm256_castsi256_si128(a));

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