FROMLIST: arm64: dts: qcom: monaco: enable the inline crypto engine for SDHC

Add an ICE node to monaco SoC description and enable it by adding a
phandle to the SDHC node.

Link: https://lore.kernel.org/all/20260310113557.348502-4-neeraj.soni@oss.qualcomm.com/
Signed-off-by: Neeraj Soni <neeraj.soni@oss.qualcomm.com>
Signed-off-by: Abhinaba Rakshit <abhinaba.rakshit@oss.qualcomm.com>

Author: arakshit011

arch/arm64/boot/dts/qcom/monaco.dtsi

@@ -4533,6 +4533,8 @@
 			supports-cqe;
 			dma-coherent;
 
+			qcom,ice = <&sdhc_ice>;
+
 			status = "disabled";
 
 			sdhc1_opp_table: opp-table {
@@ -4560,6 +4562,13 @@
 			};
 		};
 
+		sdhc_ice: crypto@87c8000 {
+			compatible = "qcom,qcs8300-inline-crypto-engine",
+				     "qcom,inline-crypto-engine";
+			reg = <0x0 0x087c8000 0x0 0x18000>;
+			clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK>;
+		};
+
 		usb_1_hsphy: phy@8904000 {
 			compatible = "qcom,qcs8300-usb-hs-phy",
 				     "qcom,usb-snps-hs-7nm-phy";