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Merge pull request #315 from wenmliu/qcom-6.18.y
Add Camera Support for Hamoa EVK
2 parents d993cae + edfe235 commit 9cf1345

21 files changed

Lines changed: 2164 additions & 75 deletions

Documentation/devicetree/bindings/media/qcom,x1e80100-camss.yaml

Lines changed: 81 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -104,6 +104,7 @@ properties:
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- const: sf_icp_mnoc
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iommus:
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minItems: 5
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maxItems: 8
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power-domains:
@@ -126,38 +127,109 @@ properties:
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description:
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Phandle to 1.8V regulator supply to a PHY.
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phys:
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maxItems: 4
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phy-names:
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items:
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- const: csiphy0
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- const: csiphy1
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- const: csiphy2
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- const: csiphy4
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description:
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CSI input ports.
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CSI input ports. Supports either standard single sensor mode or
145+
Qualcomm's combo mode with one sensor in 2x1 + 1x1 data-lane, clock-lane mode.
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135147
patternProperties:
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"^port@[0-3]$":
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port for receiving CSI data from a CSIPHY.
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Input port for receiving CSI data.
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properties:
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endpoint:
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endpoint@0:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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description:
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Endpoint for receiving a single sensor input (or first leg of combo).
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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maxItems: 4 # Base max allows 4 (for D-PHY)
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clock-lanes:
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maxItems: 1
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bus-type:
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enum:
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- 1 # MEDIA_BUS_TYPE_CSI2_CPHY
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- 4 # MEDIA_BUS_TYPE_CSI2_DPHY
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endpoint@1:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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description:
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Endpoint for receiving the second leg of a combo sensor input.
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properties:
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data-lanes:
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maxItems: 1
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clock-lanes:
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maxItems: 1
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bus-type:
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const: 4 # Combo is D-PHY specific
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required:
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- data-lanes
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allOf:
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# Case 1: Combo Mode (endpoint@1 is present)
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# If endpoint@1 exists, we restrict endpoint@0 to 2 lanes (D-PHY split)
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- if:
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required:
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- endpoint@1
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then:
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properties:
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endpoint@0:
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properties:
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data-lanes:
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minItems: 2
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maxItems: 2
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bus-type:
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const: 4
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endpoint@1:
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properties:
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data-lanes:
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minItems: 1
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maxItems: 1
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bus-type:
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const: 4
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# Case 2: Single Mode (endpoint@1 is missing)
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# We explicitly allow up to 4 lanes here to cover the D-PHY use case.
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- if:
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not:
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required:
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- endpoint@1
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then:
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properties:
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endpoint@0:
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properties:
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data-lanes:
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minItems: 1
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maxItems: 4
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161233
required:
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- compatible
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- reg
@@ -171,8 +243,6 @@ required:
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- iommus
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- power-domains
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- power-domain-names
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- vdd-csiphy-0p8-supply
175-
- vdd-csiphy-1p2-supply
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- ports
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additionalProperties: false
@@ -333,11 +403,8 @@ examples:
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iommus = <&apps_smmu 0x800 0x60>,
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<&apps_smmu 0x860 0x60>,
336-
<&apps_smmu 0x1800 0x60>,
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<&apps_smmu 0x1860 0x60>,
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<&apps_smmu 0x18e0 0x00>,
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<&apps_smmu 0x1980 0x20>,
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<&apps_smmu 0x1900 0x00>,
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<&apps_smmu 0x19a0 0x20>;
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power-domains = <&camcc CAM_CC_IFE_0_GDSC>,
@@ -351,6 +418,11 @@ examples:
351418
vdd-csiphy-0p8-supply = <&csiphy_0p8_supply>;
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vdd-csiphy-1p2-supply = <&csiphy_1p2_supply>;
353420
421+
phys = <&csiphy0>, <&csiphy1>,
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<&csiphy2>, <&csiphy4>;
423+
phy-names = "csiphy0", "csiphy1",
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"csiphy2", "csiphy4";
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354426
ports {
355427
#address-cells = <1>;
356428
#size-cells = <0>;
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@@ -0,0 +1,114 @@
1+
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/phy/qcom,x1e80100-csi2-phy.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Qualcomm CSI2 PHY
8+
9+
maintainers:
10+
- Bryan O'Donoghue <bod@kernel.org>
11+
12+
description:
13+
Qualcomm MIPI CSI2 C-PHY/D-PHY combination PHY. Connects MIPI CSI2 sensors
14+
to Qualcomm's Camera CSI Decoder. The PHY supports both C-PHY and D-PHY
15+
modes.
16+
17+
properties:
18+
compatible:
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const: qcom,x1e80100-csi2-phy
20+
21+
reg:
22+
maxItems: 1
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24+
"#phy-cells":
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const: 1
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27+
clocks:
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maxItems: 4
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clock-names:
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items:
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- const: csiphy
33+
- const: csiphy_timer
34+
- const: camnoc_axi
35+
- const: cpas_ahb
36+
37+
interrupts:
38+
maxItems: 1
39+
40+
operating-points-v2:
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maxItems: 1
42+
43+
power-domains:
44+
maxItems: 1
45+
46+
vdda-0p8-supply:
47+
description: Phandle to a 0.8V regulator supply to a PHY.
48+
49+
vdda-1p2-supply:
50+
description: Phandle to 1.2V regulator supply to a PHY.
51+
52+
required:
53+
- compatible
54+
- reg
55+
- "#phy-cells"
56+
- clocks
57+
- clock-names
58+
- interrupts
59+
- operating-points-v2
60+
- power-domains
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- vdda-0p8-supply
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- vdda-1p2-supply
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64+
additionalProperties: false
65+
66+
examples:
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- |
68+
#include <dt-bindings/interrupt-controller/arm-gic.h>
69+
#include <dt-bindings/clock/qcom,x1e80100-camcc.h>
70+
#include <dt-bindings/clock/qcom,x1e80100-gcc.h>
71+
#include <dt-bindings/phy/phy.h>
72+
73+
csiphy@ace4000 {
74+
compatible = "qcom,x1e80100-csi2-phy";
75+
reg = <0x0ace4000 0x2000>;
76+
#phy-cells = <1>;
77+
78+
clocks = <&camcc CAM_CC_CSIPHY0_CLK>,
79+
<&camcc CAM_CC_CSI0PHYTIMER_CLK>,
80+
<&camcc CAM_CC_CAMNOC_AXI_RT_CLK>,
81+
<&camcc CAM_CC_CPAS_AHB_CLK>;
82+
clock-names = "csiphy",
83+
"csiphy_timer",
84+
"camnoc_axi",
85+
"cpas_ahb";
86+
87+
operating-points-v2 = <&csiphy_opp_table>;
88+
89+
interrupts = <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>;
90+
91+
power-domains = <&camcc CAM_CC_TITAN_TOP_GDSC>;
92+
93+
vdda-0p8-supply = <&vreg_l2c_0p8>;
94+
vdda-1p2-supply = <&vreg_l1c_1p2>;
95+
};
96+
97+
csiphy_opp_table: opp-table-csiphy {
98+
compatible = "operating-points-v2";
99+
100+
opp-300000000 {
101+
opp-hz = /bits/ 64 <300000000>;
102+
required-opps = <&rpmhpd_opp_low_svs_d1>;
103+
};
104+
105+
opp-400000000 {
106+
opp-hz = /bits/ 64 <400000000>;
107+
required-opps = <&rpmhpd_opp_low_svs>;
108+
};
109+
110+
opp-480000000 {
111+
opp-hz = /bits/ 64 <480000000>;
112+
required-opps = <&rpmhpd_opp_low_svs>;
113+
};
114+
};

MAINTAINERS

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Original file line numberDiff line numberDiff line change
@@ -21243,6 +21243,17 @@ S: Maintained
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F: Documentation/devicetree/bindings/media/qcom,*-iris.yaml
2124421244
F: drivers/media/platform/qcom/iris/
2124521245

21246+
QUALCOMM MIPI CSI2 PHY DRIVER
21247+
M: Bryan O'Donoghue <bod@kernel.org>
21248+
L: linux-phy@lists.infradead.org
21249+
L: linux-media@vger.kernel.org
21250+
L: linux-arm-msm@vger.kernel.org
21251+
S: Supported
21252+
F: Documentation/devicetree/bindings/phy/qcom,*-csi2-phy.yaml
21253+
F: drivers/phy/qualcomm/phy-qcom-mipi-csi2*.c
21254+
F: drivers/phy/qualcomm/phy-qcom-mipi-csi2*.h
21255+
F: include/dt-bindings/phy/phy-qcom-mipi-csi2*
21256+
2124621257
QUALCOMM NAND CONTROLLER DRIVER
2124721258
M: Manivannan Sadhasivam <mani@kernel.org>
2124821259
L: linux-mtd@lists.infradead.org

arch/arm64/boot/dts/qcom/Makefile

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Original file line numberDiff line numberDiff line change
@@ -15,6 +15,11 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb
1515
dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb
1616
dtb-$(CONFIG_ARCH_QCOM) += glymur-crd.dtb
1717
dtb-$(CONFIG_ARCH_QCOM) += hamoa-iot-evk.dtb
18+
dtb-$(CONFIG_ARCH_QCOM) += hamoa-iot-evk-camera-imx577.dtbo
19+
20+
hamoa-iot-evk-camera-imx577-dtbs := hamoa-iot-evk.dtb hamoa-iot-evk-camera-imx577.dtbo
21+
22+
dtb-$(CONFIG_ARCH_QCOM) += hamoa-iot-evk-camera-imx577.dtb
1823
dtb-$(CONFIG_ARCH_QCOM) += ipq5018-rdp432-c2.dtb
1924
dtb-$(CONFIG_ARCH_QCOM) += ipq5018-tplink-archer-ax55-v1.dtb
2025
dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp441.dtb
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1+
// SPDX-License-Identifier: BSD-3-Clause
2+
/*
3+
* Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
4+
*/
5+
6+
/dts-v1/;
7+
/plugin/;
8+
9+
#include <dt-bindings/clock/qcom,x1e80100-camcc.h>
10+
#include <dt-bindings/gpio/gpio.h>
11+
#include <dt-bindings/phy/phy.h>
12+
13+
&{/} {
14+
vreg_cam1_1p8: regulator-cam1 {
15+
compatible = "regulator-fixed";
16+
regulator-name = "vreg_cam1";
17+
startup-delay-us = <1000>;
18+
enable-active-high;
19+
gpio = <&tlmm 19 GPIO_ACTIVE_HIGH>;
20+
};
21+
};
22+
23+
&camss {
24+
status = "okay";
25+
26+
ports {
27+
#address-cells = <1>;
28+
#size-cells = <0>;
29+
30+
port@1 {
31+
#address-cells = <1>;
32+
#size-cells = <0>;
33+
34+
csiphy1_ep: endpoint@0 {
35+
clock-lanes = <7>;
36+
data-lanes = <0 1 2 3>;
37+
remote-endpoint = <&imx577_ep>;
38+
};
39+
};
40+
};
41+
};
42+
43+
&cci0 {
44+
status = "okay";
45+
};
46+
47+
&cci0_i2c1 {
48+
#address-cells = <1>;
49+
#size-cells = <0>;
50+
51+
camera@1a {
52+
compatible = "sony,imx577";
53+
reg = <0x1a>;
54+
55+
reset-gpios = <&tlmm 110 GPIO_ACTIVE_LOW>;
56+
pinctrl-0 = <&cam1_default>;
57+
pinctrl-names = "default";
58+
59+
clocks = <&camcc CAM_CC_MCLK1_CLK>;
60+
assigned-clocks = <&camcc CAM_CC_MCLK1_CLK>;
61+
assigned-clock-rates = <24000000>;
62+
63+
dvdd-supply = <&vreg_cam1_1p8>;
64+
dovdd-supply = <&vreg_l4m_1p8>;
65+
66+
port {
67+
imx577_ep: endpoint {
68+
link-frequencies = /bits/ 64 <600000000>;
69+
data-lanes = <0 1 2 3>;
70+
remote-endpoint = <&csiphy1_ep>;
71+
};
72+
};
73+
};
74+
};
75+
76+
&csiphy1 {
77+
vdda-0p8-supply = <&vreg_l2c_0p8>;
78+
vdda-1p2-supply = <&vreg_l1c_1p2>;
79+
80+
status = "okay";
81+
};

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