Skip to content

Commit 98ed0b8

Browse files
quic-bjorandeakakum-oss
authored andcommitted
FROMLIST: arm64: dts: qcom: qcs6490-rb3gen2: Enable uPD720201 and GL3590
The QCS6490 Rb3Gen2 has a Renesas μPD720201 XHCI controller hanging off the TC9563 PCIe switch, on this a Genesys Logic GL3590 USB hub provides two USB Type-A ports and an ASIX AX88179 USB 3.0 Gigabit Ethernet interface. The Renesas chip is powered by two regulators controlled through PM7250B GPIOs 1 and 4, and the power/reset pin is pulled down by PM8350C GPIO 4. The Genesys chip power is always-on, but the reset pin is controlled through TLMM GPIO 162. Describe the Renesas chip on the PCIe bus, with supplies and reset, to allow it to be brought out of reset and discovered. Then describe the two peers of the USB hub, with its reset GPIO, to allow this to be brought out of reset. The USB Type-A connectors are not described, as they are in no regard controlled by the operating system. Link: https://lore.kernel.org/all/20260212-rb3gen2-upd-gl3590-v1-1-18fb04bb32b0@oss.qualcomm.com/ Signed-off-by: Bjorn Andersson <bjorn.andersson@oss.qualcomm.com> Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
1 parent a226010 commit 98ed0b8

1 file changed

Lines changed: 161 additions & 0 deletions

File tree

arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts

Lines changed: 161 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -262,6 +262,28 @@
262262
regulator-max-microvolt = <3700000>;
263263
};
264264

265+
vreg_pcie0_1p05: regulator-pcie0-1p05v {
266+
compatible = "regulator-fixed";
267+
regulator-name = "PCIE0_1.05V";
268+
gpio = <&pm7250b_gpios 4 GPIO_ACTIVE_HIGH>;
269+
regulator-min-microvolt = <1050000>;
270+
regulator-max-microvolt = <1050000>;
271+
enable-active-high;
272+
pinctrl-0 = <&upd_pwr_en2_state>;
273+
pinctrl-names = "default";
274+
};
275+
276+
vreg_pcie0_3p3: regulator-pcie0-3p3v-dual {
277+
compatible = "regulator-fixed";
278+
regulator-name = "PCIE0_3.3V_Dual";
279+
gpio = <&pm7250b_gpios 1 GPIO_ACTIVE_HIGH>;
280+
regulator-min-microvolt = <3300000>;
281+
regulator-max-microvolt = <3300000>;
282+
enable-active-high;
283+
pinctrl-0 = <&upd_pwr_en1_state>;
284+
pinctrl-names = "default";
285+
};
286+
265287
vdd_ntn_0p9: regulator-vdd-ntn-0p9 {
266288
compatible = "regulator-fixed";
267289
regulator-name = "VDD_NTN_0P9";
@@ -788,6 +810,72 @@
788810
};
789811
};
790812
};
813+
814+
i2c-mux@71 {
815+
compatible = "nxp,pca9847";
816+
#address-cells = <1>;
817+
#size-cells = <0>;
818+
reg = <0x71>;
819+
820+
i2c@1 {
821+
#address-cells = <1>;
822+
#size-cells = <0>;
823+
824+
reg = <1>;
825+
826+
usb-hub@2d {
827+
compatible = "smsc,usb4604";
828+
reg = <0x2d>;
829+
};
830+
};
831+
832+
i2c@2 {
833+
#address-cells = <1>;
834+
#size-cells = <0>;
835+
836+
reg = <2>;
837+
838+
usb-hub@2d {
839+
compatible = "smsc,usb4604";
840+
reg = <0x2d>;
841+
};
842+
};
843+
844+
i2c@3 {
845+
#address-cells = <1>;
846+
#size-cells = <0>;
847+
848+
reg = <3>;
849+
};
850+
851+
i2c@4 {
852+
#address-cells = <1>;
853+
#size-cells = <0>;
854+
855+
reg = <4>;
856+
};
857+
858+
i2c@5 {
859+
#address-cells = <1>;
860+
#size-cells = <0>;
861+
862+
reg = <5>;
863+
};
864+
865+
i2c@6 {
866+
#address-cells = <1>;
867+
#size-cells = <0>;
868+
869+
reg = <6>;
870+
};
871+
872+
i2c@7 {
873+
#address-cells = <1>;
874+
#size-cells = <0>;
875+
876+
reg = <7>;
877+
};
878+
};
791879
};
792880

793881
&lpass_va_macro {
@@ -910,6 +998,42 @@
910998
device_type = "pci";
911999
ranges;
9121000
bus-range = <0x4 0xff>;
1001+
1002+
/* Renesas μPD720201 PCIe USB3.0 Host Controller */
1003+
usb-controller@0,0 {
1004+
compatible = "pci1912,0014";
1005+
reg = <0x40000 0x0 0x0 0x0 0x0>;
1006+
1007+
avdd33-supply = <&vreg_pcie0_3p3>;
1008+
vdd10-supply = <&vreg_pcie0_1p05>;
1009+
vdd33-supply = <&vreg_pcie0_3p3>;
1010+
1011+
pinctrl-0 = <&upd_hub_rst_state>;
1012+
pinctrl-names = "default";
1013+
1014+
#address-cells = <1>;
1015+
#size-cells = <0>;
1016+
1017+
/* Genesys Logic GL3590 USB Hub Controller */
1018+
gl3590_2_0: hub@1 {
1019+
compatible = "usb5e3,610";
1020+
reg = <1>;
1021+
1022+
reset-gpios = <&tlmm 162 GPIO_ACTIVE_HIGH>;
1023+
1024+
pinctrl-0 = <&usb_hub_reset_state>;
1025+
pinctrl-names = "default";
1026+
1027+
peer-hub = <&gl3590_3_0>;
1028+
};
1029+
1030+
gl3590_3_0: hub@2 {
1031+
compatible = "usb5e3,625";
1032+
reg = <2>;
1033+
1034+
peer-hub = <&gl3590_2_0>;
1035+
};
1036+
};
9131037
};
9141038

9151039
pcie@3,0 {
@@ -1579,6 +1703,17 @@
15791703
power-source = <0>;
15801704
};
15811705

1706+
upd_hub_rst_state: upd-hub-rst-state {
1707+
pins = "gpio4";
1708+
function = "normal";
1709+
1710+
bias-disable;
1711+
input-disable;
1712+
output-enable;
1713+
output-high;
1714+
power-source = <0>;
1715+
};
1716+
15821717
tc9563_resx_n: tc9563-resx-state {
15831718
pins = "gpio1";
15841719
function = "normal";
@@ -1759,6 +1894,15 @@
17591894
};
17601895

17611896
&pm7250b_gpios {
1897+
upd_pwr_en1_state: upd-pwr-en1-state {
1898+
pins = "gpio1";
1899+
function = "normal";
1900+
1901+
output-enable;
1902+
input-disable;
1903+
power-source = <0>;
1904+
};
1905+
17621906
lt9611_rst_pin: lt9611-rst-state {
17631907
pins = "gpio2";
17641908
function = "normal";
@@ -1767,6 +1911,15 @@
17671911
input-disable;
17681912
power-source = <0>;
17691913
};
1914+
1915+
upd_pwr_en2_state: upd-pwr-en2-state {
1916+
pins = "gpio4";
1917+
function = "normal";
1918+
1919+
output-enable;
1920+
input-disable;
1921+
power-source = <0>;
1922+
};
17701923
};
17711924

17721925
&sdc2_clk {
@@ -1812,6 +1965,14 @@
18121965
function = "gpio";
18131966
bias-pull-up;
18141967
};
1968+
1969+
usb_hub_reset_state: usb-hub-reset-state {
1970+
pins = "gpio162";
1971+
function = "gpio";
1972+
1973+
drive-strength = <2>;
1974+
bias-disable;
1975+
};
18151976
};
18161977

18171978
&lpass_audiocc {

0 commit comments

Comments
 (0)