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FROMLIST: remoteproc: qcom: pas: Enable Secure PAS support with IOMMU managed by Linux
Most Qualcomm platforms feature Gunyah hypervisor, which typically handles IOMMU configuration. This includes mapping memory regions and device memory resources for remote processors by intercepting qcom_scm_pas_auth_and_reset() calls. These mappings are later removed during teardown. Additionally, SHM bridge setup is required to enable memory protection for both remoteproc metadata and its memory regions. When the aforementioned hypervisor is absent, the operating system must perform these configurations instead. When Linux runs as the hypervisor (@ EL2) on a SoC, it will have its own device tree overlay file that specifies the firmware stream ID now managed by Linux for a particular remote processor. If the iommus property is specified in the remoteproc device tree node, it indicates that IOMMU configuration must be handled by Linux. In this case, the has_iommu flag is set for the remote processor, which ensures that the resource table, carveouts, and SHM bridge are properly configured before memory is passed to TrustZone for authentication. Otherwise, the has_iommu flag remains unset, which indicates default behavior. Enables Secure PAS support for remote processors when IOMMU configuration is managed by Linux. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260105-kvmrprocv10-v10-13-022e96815380@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
1 parent 21dea35 commit 73e52bd

1 file changed

Lines changed: 43 additions & 5 deletions

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drivers/remoteproc/qcom_q6v5_pas.c

Lines changed: 43 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
#include <linux/delay.h>
1212
#include <linux/firmware.h>
1313
#include <linux/interrupt.h>
14+
#include <linux/iommu.h>
1415
#include <linux/kernel.h>
1516
#include <linux/module.h>
1617
#include <linux/of.h>
@@ -255,6 +256,22 @@ static int qcom_pas_load(struct rproc *rproc, const struct firmware *fw)
255256
return ret;
256257
}
257258

259+
static void qcom_pas_unmap_carveout(struct rproc *rproc, phys_addr_t mem_phys, size_t size)
260+
{
261+
if (rproc->has_iommu)
262+
iommu_unmap(rproc->domain, mem_phys, size);
263+
}
264+
265+
static int qcom_pas_map_carveout(struct rproc *rproc, phys_addr_t mem_phys, size_t size)
266+
{
267+
int ret = 0;
268+
269+
if (rproc->has_iommu)
270+
ret = iommu_map(rproc->domain, mem_phys, mem_phys, size,
271+
IOMMU_READ | IOMMU_WRITE, GFP_KERNEL);
272+
return ret;
273+
}
274+
258275
static int qcom_pas_start(struct rproc *rproc)
259276
{
260277
struct qcom_pas *pas = rproc->priv;
@@ -289,11 +306,15 @@ static int qcom_pas_start(struct rproc *rproc)
289306
}
290307

291308
if (pas->dtb_pas_id) {
292-
ret = qcom_scm_pas_auth_and_reset(pas->dtb_pas_id);
309+
ret = qcom_pas_map_carveout(rproc, pas->dtb_mem_phys, pas->dtb_mem_size);
310+
if (ret)
311+
goto disable_px_supply;
312+
313+
ret = qcom_scm_pas_prepare_and_auth_reset(pas->dtb_pas_ctx);
293314
if (ret) {
294315
dev_err(pas->dev,
295316
"failed to authenticate dtb image and release reset\n");
296-
goto disable_px_supply;
317+
goto unmap_dtb_carveout;
297318
}
298319
}
299320

@@ -304,18 +325,22 @@ static int qcom_pas_start(struct rproc *rproc)
304325

305326
qcom_pil_info_store(pas->info_name, pas->mem_phys, pas->mem_size);
306327

307-
ret = qcom_scm_pas_auth_and_reset(pas->pas_id);
328+
ret = qcom_pas_map_carveout(rproc, pas->mem_phys, pas->mem_size);
329+
if (ret)
330+
goto release_pas_metadata;
331+
332+
ret = qcom_scm_pas_prepare_and_auth_reset(pas->pas_ctx);
308333
if (ret) {
309334
dev_err(pas->dev,
310335
"failed to authenticate image and release reset\n");
311-
goto release_pas_metadata;
336+
goto unmap_carveout;
312337
}
313338

314339
ret = qcom_q6v5_wait_for_start(&pas->q6v5, msecs_to_jiffies(5000));
315340
if (ret == -ETIMEDOUT) {
316341
dev_err(pas->dev, "start timed out\n");
317342
qcom_scm_pas_shutdown(pas->pas_id);
318-
goto release_pas_metadata;
343+
goto unmap_carveout;
319344
}
320345

321346
qcom_scm_pas_metadata_release(pas->pas_ctx);
@@ -327,10 +352,16 @@ static int qcom_pas_start(struct rproc *rproc)
327352

328353
return 0;
329354

355+
unmap_carveout:
356+
qcom_pas_unmap_carveout(rproc, pas->mem_phys, pas->mem_size);
330357
release_pas_metadata:
331358
qcom_scm_pas_metadata_release(pas->pas_ctx);
332359
if (pas->dtb_pas_id)
333360
qcom_scm_pas_metadata_release(pas->dtb_pas_ctx);
361+
362+
unmap_dtb_carveout:
363+
if (pas->dtb_pas_id)
364+
qcom_pas_unmap_carveout(rproc, pas->dtb_mem_phys, pas->dtb_mem_size);
334365
disable_px_supply:
335366
if (pas->px_supply)
336367
regulator_disable(pas->px_supply);
@@ -386,8 +417,12 @@ static int qcom_pas_stop(struct rproc *rproc)
386417
ret = qcom_scm_pas_shutdown(pas->dtb_pas_id);
387418
if (ret)
388419
dev_err(pas->dev, "failed to shutdown dtb: %d\n", ret);
420+
421+
qcom_pas_unmap_carveout(rproc, pas->dtb_mem_phys, pas->dtb_mem_size);
389422
}
390423

424+
qcom_pas_unmap_carveout(rproc, pas->mem_phys, pas->mem_size);
425+
391426
handover = qcom_q6v5_unprepare(&pas->q6v5);
392427
if (handover)
393428
qcom_pas_handover(&pas->q6v5);
@@ -757,6 +792,7 @@ static int qcom_pas_probe(struct platform_device *pdev)
757792
return -ENOMEM;
758793
}
759794

795+
rproc->has_iommu = of_property_present(pdev->dev.of_node, "iommus");
760796
rproc->auto_boot = desc->auto_boot;
761797
rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
762798

@@ -836,6 +872,8 @@ static int qcom_pas_probe(struct platform_device *pdev)
836872
goto remove_ssr_sysmon;
837873
}
838874

875+
pas->pas_ctx->use_tzmem = rproc->has_iommu;
876+
pas->dtb_pas_ctx->use_tzmem = rproc->has_iommu;
839877
ret = rproc_add(rproc);
840878
if (ret)
841879
goto remove_ssr_sysmon;

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