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11 | 11 | &{/} { |
12 | 12 | model = "Qualcomm Technologies, Inc. Lemans-evk Mezzanine"; |
13 | 13 |
|
| 14 | + panel_lvds: panel-lvds@0 { |
| 15 | + compatible = "panel-lvds"; |
| 16 | + |
| 17 | + data-mapping = "vesa-24"; |
| 18 | + |
| 19 | + width-mm = <476>; |
| 20 | + height-mm = <268>; |
| 21 | + |
| 22 | + status = "okay"; |
| 23 | + |
| 24 | + panel-timing { |
| 25 | + clock-frequency = <148500000>; |
| 26 | + hactive = <1920>; |
| 27 | + vactive = <1080>; |
| 28 | + hfront-porch = <88>; |
| 29 | + hback-porch = <148>; |
| 30 | + hsync-len = <44>; |
| 31 | + vfront-porch = <4>; |
| 32 | + vback-porch = <36>; |
| 33 | + vsync-len = <5>; |
| 34 | + de-active = <1>; |
| 35 | + }; |
| 36 | + |
| 37 | + ports { |
| 38 | + #address-cells = <1>; |
| 39 | + #size-cells = <0>; |
| 40 | + |
| 41 | + port@0 { |
| 42 | + reg = <0>; |
| 43 | + |
| 44 | + dual-lvds-odd-pixels; |
| 45 | + panel_in_lvds_odd: endpoint { |
| 46 | + remote-endpoint = <<9211c_out_odd>; |
| 47 | + }; |
| 48 | + }; |
| 49 | + |
| 50 | + port@1 { |
| 51 | + reg = <1>; |
| 52 | + |
| 53 | + dual-lvds-even-pixels; |
| 54 | + panel_in_lvds_even: endpoint { |
| 55 | + remote-endpoint = <<9211c_out_even>; |
| 56 | + }; |
| 57 | + }; |
| 58 | + }; |
| 59 | + }; |
| 60 | + |
| 61 | + lcd_disp_bias: regulator-lcd-disp-bias { |
| 62 | + compatible = "regulator-fixed"; |
| 63 | + regulator-name = "lcd_disp_bias"; |
| 64 | + regulator-min-microvolt = <5500000>; |
| 65 | + regulator-max-microvolt = <5500000>; |
| 66 | + gpio = <&expander3 1 GPIO_ACTIVE_HIGH>; |
| 67 | + enable-active-high; |
| 68 | + }; |
| 69 | + |
14 | 70 | vreg_0p9: regulator-vreg-0p9 { |
15 | 71 | compatible = "regulator-fixed"; |
16 | 72 | regulator-name = "VREG_0P9"; |
|
158 | 214 | }; |
159 | 215 | }; |
160 | 216 |
|
| 217 | +&i2c1 { |
| 218 | + qcom,load-firmware; |
| 219 | + qcom,xfer-mode = <1>; |
| 220 | + pinctrl-names = "default"; |
| 221 | + pinctrl-0 = <&qup_i2c1_default>; |
| 222 | + |
| 223 | + status = "okay"; |
| 224 | + |
| 225 | + lt9211c_codec: lvds-bridge@2d { |
| 226 | + compatible = "lontium,lt9211c"; |
| 227 | + reg = <0x2d>; |
| 228 | + reset-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; |
| 229 | + vcc-supply = <&vreg_s4a>; |
| 230 | + |
| 231 | + status = "okay"; |
| 232 | + |
| 233 | + ports { |
| 234 | + #address-cells = <1>; |
| 235 | + #size-cells = <0>; |
| 236 | + |
| 237 | + port@0 { |
| 238 | + reg = <0>; |
| 239 | + |
| 240 | + lt9211c_in: endpoint { |
| 241 | + data-lanes = <0 1 2 3>; |
| 242 | + remote-endpoint = <&mdss0_dsi0_out>; |
| 243 | + }; |
| 244 | + }; |
| 245 | + |
| 246 | + port@2 { |
| 247 | + reg = <2>; |
| 248 | + |
| 249 | + lt9211c_out_odd: endpoint { |
| 250 | + remote-endpoint = <&panel_in_lvds_odd>; |
| 251 | + }; |
| 252 | + }; |
| 253 | + |
| 254 | + port@3 { |
| 255 | + reg = <3>; |
| 256 | + |
| 257 | + lt9211c_out_even: endpoint { |
| 258 | + remote-endpoint = <&panel_in_lvds_even>; |
| 259 | + }; |
| 260 | + }; |
| 261 | + }; |
| 262 | + }; |
| 263 | + |
| 264 | +}; |
| 265 | + |
161 | 266 | &i2c18 { |
162 | 267 | #address-cells = <1>; |
163 | 268 | #size-cells = <0>; |
|
179 | 284 | }; |
180 | 285 | }; |
181 | 286 |
|
| 287 | +&mdss0 { |
| 288 | + status = "okay"; |
| 289 | +}; |
| 290 | + |
| 291 | +&mdss0_dsi0 { |
| 292 | + vdda-supply = <&vreg_l1c>; |
| 293 | + power-supply = <&lcd_disp_bias>; |
| 294 | + status = "okay"; |
| 295 | +}; |
| 296 | + |
| 297 | +&mdss0_dsi0_out { |
| 298 | + data-lanes = <0 1 2 3>; |
| 299 | + remote-endpoint = <<9211c_in>; |
| 300 | +}; |
| 301 | + |
| 302 | +&mdss0_dsi0_phy { |
| 303 | + vdds-supply = <&vreg_l4a>; |
| 304 | + status = "okay"; |
| 305 | +}; |
| 306 | + |
182 | 307 | &pcie0 { |
183 | 308 | iommu-map = <0x0 &pcie_smmu 0x0 0x1>, |
184 | 309 | <0x100 &pcie_smmu 0x1 0x1>, |
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