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Songwei Chaijiegan0107
Songwei Chai
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jiegan0107
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FROMLIST: coresight: Add coresight TGU driver
Add driver to support Coresight device TGU (Trigger Generation Unit). TGU is a Data Engine which can be utilized to sense a plurality of signals and create a trigger into the CTI or generate interrupts to processors. Add probe/enable/disable functions for tgu. Link: https://lore.kernel.org/all/20250423-tgu_patch-v5-2-3b52c105cc63@quicinc.com/ Signed-off-by: Songwei Chai <quic_songchai@quicinc.com>
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‎Documentation/ABI/testing/sysfs-bus-coresight-devices-tgu‎

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What: /sys/bus/coresight/devices/<tgu-name>/enable_tgu
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Date: February 2025
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KernelVersion 6.15
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Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Sam Chai (QUIC) <quic_songchai@quicinc.com>
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Description:
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(RW) Set/Get the enable/disable status of TGU
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Accepts only one of the 2 values - 0 or 1.
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0 : disable TGU.
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1 : enable TGU.

‎drivers/hwtracing/coresight/Kconfig‎

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@@ -291,4 +291,15 @@ config CORESIGHT_REMOTE_ETM
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To compile this driver as a module, choose M here: the module will be
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called coresight-remote-etm.
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config CORESIGHT_TGU
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tristate "CoreSight Trigger Generation Unit driver"
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help
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This driver provides support for Trigger Generation Unit that is
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used to detect patterns or sequences on a given set of signals.
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TGU is used to monitor a particular bus within a given region to
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detect illegal transaction sequences or slave responses. It is also
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used to monitor a data stream to detect protocol violations and to
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provide a trigger point for centering data around a specific event
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within the trace data buffer.
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endif

‎drivers/hwtracing/coresight/Makefile‎

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@@ -55,6 +55,7 @@ obj-$(CONFIG_ULTRASOC_SMB) += ultrasoc-smb.o
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obj-$(CONFIG_CORESIGHT_QMI) += coresight-qmi.o
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obj-$(CONFIG_CORESIGHT_REMOTE_ETM) += coresight-remote-etm.o
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obj-$(CONFIG_CORESIGHT_DUMMY) += coresight-dummy.o
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obj-$(CONFIG_CORESIGHT_TGU) += coresight-tgu.o
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obj-$(CONFIG_CORESIGHT_CTCU) += coresight-ctcu.o
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coresight-ctcu-y := coresight-ctcu-core.o
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obj-$(CONFIG_CORESIGHT_KUNIT_TESTS) += coresight-kunit-tests.o

‎drivers/hwtracing/coresight/coresight-tgu.c‎

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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/amba/bus.h>
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#include <linux/coresight.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include "coresight-priv.h"
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#include "coresight-tgu.h"
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DEFINE_CORESIGHT_DEVLIST(tgu_devs, "tgu");
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static void tgu_write_all_hw_regs(struct tgu_drvdata *drvdata)
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{
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CS_UNLOCK(drvdata->base);
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/* Enable TGU to program the triggers */
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tgu_writel(drvdata, 1, TGU_CONTROL);
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CS_LOCK(drvdata->base);
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}
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static int tgu_enable(struct coresight_device *csdev, enum cs_mode mode,
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void *data)
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{
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struct tgu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock(&drvdata->spinlock);
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if (drvdata->enable) {
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spin_unlock(&drvdata->spinlock);
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return -EBUSY;
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}
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tgu_write_all_hw_regs(drvdata);
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drvdata->enable = true;
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spin_unlock(&drvdata->spinlock);
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return 0;
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}
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static int tgu_disable(struct coresight_device *csdev, void *data)
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{
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struct tgu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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spin_lock(&drvdata->spinlock);
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if (drvdata->enable) {
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CS_UNLOCK(drvdata->base);
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tgu_writel(drvdata, 0, TGU_CONTROL);
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CS_LOCK(drvdata->base);
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drvdata->enable = false;
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}
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spin_unlock(&drvdata->spinlock);
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return 0;
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}
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static ssize_t enable_tgu_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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bool enabled;
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struct tgu_drvdata *drvdata = dev_get_drvdata(dev->parent);
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spin_lock(&drvdata->spinlock);
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enabled = drvdata->enable;
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spin_unlock(&drvdata->spinlock);
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return sysfs_emit(buf, "%d\n", enabled);
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}
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/* enable_tgu_store - Configure Trace and Gating Unit (TGU) triggers. */
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static ssize_t enable_tgu_store(struct device *dev,
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struct device_attribute *attr, const char *buf,
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size_t size)
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{
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int ret = 0;
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unsigned long val;
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struct tgu_drvdata *drvdata = dev_get_drvdata(dev->parent);
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ret = kstrtoul(buf, 0, &val);
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if (ret)
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return ret;
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if (val) {
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ret = pm_runtime_resume_and_get(dev->parent);
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if (ret)
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return ret;
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ret = tgu_enable(drvdata->csdev, CS_MODE_SYSFS, NULL);
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if (ret)
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pm_runtime_put(dev->parent);
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} else {
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ret = tgu_disable(drvdata->csdev, NULL);
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pm_runtime_put(dev->parent);
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}
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if (ret)
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return ret;
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return size;
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}
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static DEVICE_ATTR_RW(enable_tgu);
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static const struct coresight_ops_helper tgu_helper_ops = {
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.enable = tgu_enable,
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.disable = tgu_disable,
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};
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static const struct coresight_ops tgu_ops = {
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.helper_ops = &tgu_helper_ops,
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};
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static struct attribute *tgu_common_attrs[] = {
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&dev_attr_enable_tgu.attr,
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NULL,
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};
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static const struct attribute_group tgu_common_grp = {
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.attrs = tgu_common_attrs,
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{ NULL },
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};
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static const struct attribute_group *tgu_attr_groups[] = {
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&tgu_common_grp,
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NULL,
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};
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static int tgu_probe(struct amba_device *adev, const struct amba_id *id)
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{
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int ret = 0;
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struct device *dev = &adev->dev;
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struct coresight_desc desc = { 0 };
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struct coresight_platform_data *pdata;
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struct tgu_drvdata *drvdata;
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desc.name = coresight_alloc_device_name(&tgu_devs, dev);
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if (!desc.name)
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return -ENOMEM;
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pdata = coresight_get_platform_data(dev);
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if (IS_ERR(pdata))
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return PTR_ERR(pdata);
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adev->dev.platform_data = pdata;
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drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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drvdata->dev = &adev->dev;
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dev_set_drvdata(dev, drvdata);
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drvdata->base = devm_ioremap_resource(dev, &adev->res);
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if (!drvdata->base)
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return -ENOMEM;
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spin_lock_init(&drvdata->spinlock);
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drvdata->enable = false;
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desc.type = CORESIGHT_DEV_TYPE_HELPER;
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desc.pdata = adev->dev.platform_data;
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desc.dev = &adev->dev;
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desc.ops = &tgu_ops;
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desc.groups = tgu_attr_groups;
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drvdata->csdev = coresight_register(&desc);
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if (IS_ERR(drvdata->csdev)) {
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ret = PTR_ERR(drvdata->csdev);
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goto err;
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}
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pm_runtime_put(&adev->dev);
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return 0;
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err:
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pm_runtime_put(&adev->dev);
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return ret;
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}
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static void tgu_remove(struct amba_device *adev)
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{
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struct tgu_drvdata *drvdata = dev_get_drvdata(&adev->dev);
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coresight_unregister(drvdata->csdev);
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}
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static const struct amba_id tgu_ids[] = {
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{
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.id = 0x000f0e00,
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.mask = 0x000fffff,
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.data = "TGU",
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},
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{ 0, 0, NULL },
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};
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MODULE_DEVICE_TABLE(amba, tgu_ids);
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static struct amba_driver tgu_driver = {
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.drv = {
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.name = "coresight-tgu",
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.suppress_bind_attrs = true,
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},
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.probe = tgu_probe,
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.remove = tgu_remove,
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.id_table = tgu_ids,
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};
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module_amba_driver(tgu_driver);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("CoreSight TGU driver");

‎drivers/hwtracing/coresight/coresight-tgu.h‎

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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef _CORESIGHT_TGU_H
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#define _CORESIGHT_TGU_H
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/* Register addresses */
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#define TGU_CONTROL 0x0000
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/* Register read/write */
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#define tgu_writel(drvdata, val, off) __raw_writel((val), drvdata->base + off)
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#define tgu_readl(drvdata, off) __raw_readl(drvdata->base + off)
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/**
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* struct tgu_drvdata - Data structure for a TGU (Trigger Generator Unit)
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* @base: Memory-mapped base address of the TGU device
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* @dev: Pointer to the associated device structure
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* @csdev: Pointer to the associated coresight device
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* @spinlock: Spinlock for handling concurrent access
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* @enable: Flag indicating whether the TGU device is enabled
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*
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* This structure defines the data associated with a TGU device,
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* including its base address, device pointers, clock, spinlock for
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* synchronization, trigger data pointers, maximum limits for various
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* trigger-related parameters, and enable status.
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*/
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struct tgu_drvdata {
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void __iomem *base;
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struct device *dev;
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struct coresight_device *csdev;
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spinlock_t spinlock;
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bool enable;
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};
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#endif

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