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Merge pull request #286 from akakum-qualcomm/my-feature
WORKAROUND: Change to enable USB type A ports on rb3gen2
2 parents 8f8218e + 8885e6e commit 3fb7eba

14 files changed

Lines changed: 1824 additions & 43 deletions

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Documentation/devicetree/bindings/arm/qcom.yaml

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@@ -1046,6 +1046,7 @@ properties:
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- items:
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- enum:
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- ayaneo,pocket-s2
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- qcom,sm8650-hdk
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- qcom,sm8650-mtp
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- qcom,sm8650-qrd
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/renesas,upd720201-pci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: UPD720201/UPD720202 USB 3.0 xHCI Host Controller (PCIe)
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maintainers:
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- Neil Armstrong <neil.armstrong@linaro.org>
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description:
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UPD720201 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface.
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The UPD720202 supports up to two downstream ports, while UPD720201
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supports up to four downstream USB 3.0 rev1.0 ports.
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properties:
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compatible:
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const: pci1912,0014
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reg:
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maxItems: 1
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avdd33-supply:
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description: +3.3 V power supply for analog circuit
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vdd10-supply:
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description: +1.05 V power supply
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vdd33-supply:
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description: +3.3 V power supply
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required:
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- compatible
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- reg
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- avdd33-supply
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- vdd10-supply
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- vdd33-supply
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allOf:
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- $ref: usb-xhci.yaml
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additionalProperties: false
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examples:
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- |
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pcie@0 {
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reg = <0x0 0x1000>;
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ranges = <0x02000000 0x0 0x100000 0x10000000 0x0 0x0>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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usb-controller@0 {
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compatible = "pci1912,0014";
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reg = <0x0 0x0 0x0 0x0 0x0>;
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avdd33-supply = <&avdd33_reg>;
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vdd10-supply = <&vdd10_reg>;
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vdd33-supply = <&vdd33_reg>;
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};
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};

Documentation/devicetree/bindings/vendor-prefixes.yaml

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@@ -211,6 +211,8 @@ patternProperties:
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description: Axiado Corporation
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"^axis,.*":
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description: Axis Communications AB
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"^ayaneo,.*":
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description: Anyun Intelligent Technology (Hong Kong) Co., Ltd
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"^azoteq,.*":
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description: Azoteq (Pty) Ltd
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"^azw,.*":

arch/arm64/boot/dts/qcom/Makefile

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@@ -343,6 +343,7 @@ dtb-$(CONFIG_ARCH_QCOM) += sm8550-mtp.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sm8550-qrd.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sm8550-samsung-q5q.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sm8550-sony-xperia-yodo-pdx234.dtb
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dtb-$(CONFIG_ARCH_QCOM) += sm8650-ayaneo-pocket-s2.dtb
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sm8650-hdk-display-card-dtbs := sm8650-hdk.dtb sm8650-hdk-display-card.dtbo
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arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts

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@@ -272,6 +272,28 @@
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regulator-max-microvolt = <3700000>;
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};
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vreg_pcie0_1p05: regulator-pcie0-1p05v {
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compatible = "regulator-fixed";
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regulator-name = "PCIE0_1.05V";
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gpio = <&pm7250b_gpios 4 GPIO_ACTIVE_HIGH>;
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regulator-min-microvolt = <1050000>;
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regulator-max-microvolt = <1050000>;
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enable-active-high;
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pinctrl-0 = <&upd_pwr_en2_state>;
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pinctrl-names = "default";
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};
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vreg_pcie0_3p3: regulator-pcie0-3p3v-dual {
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compatible = "regulator-fixed";
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regulator-name = "PCIE0_3.3V_Dual";
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gpio = <&pm7250b_gpios 1 GPIO_ACTIVE_HIGH>;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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pinctrl-0 = <&upd_pwr_en1_state>;
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pinctrl-names = "default";
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};
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vdd_ntn_0p9: regulator-vdd-ntn-0p9 {
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compatible = "regulator-fixed";
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regulator-name = "VDD_NTN_0P9";
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};
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};
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};
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i2c-mux@71 {
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compatible = "nxp,pca9847";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x71>;
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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usb-hub@2d {
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compatible = "smsc,usb4604";
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reg = <0x2d>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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usb-hub@2d {
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compatible = "smsc,usb4604";
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reg = <0x2d>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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};
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i2c@5 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <5>;
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};
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i2c@6 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <6>;
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};
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i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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};
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};
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};
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&lpass_va_macro {
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device_type = "pci";
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ranges;
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bus-range = <0x4 0xff>;
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/* Renesas μPD720201 PCIe USB3.0 Host Controller */
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usb-controller@0,0 {
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compatible = "pci1912,0014";
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reg = <0x40000 0x0 0x0 0x0 0x0>;
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avdd33-supply = <&vreg_pcie0_3p3>;
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vdd10-supply = <&vreg_pcie0_1p05>;
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vdd33-supply = <&vreg_pcie0_3p3>;
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pinctrl-0 = <&upd_hub_rst_state>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Genesys Logic GL3590 USB Hub Controller */
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gl3590_2_0: hub@1 {
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compatible = "usb5e3,610";
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reg = <1>;
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reset-gpios = <&tlmm 162 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&usb_hub_reset_state>;
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pinctrl-names = "default";
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peer-hub = <&gl3590_3_0>;
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};
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gl3590_3_0: hub@2 {
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compatible = "usb5e3,625";
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reg = <2>;
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peer-hub = <&gl3590_2_0>;
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};
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};
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};
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pcie@3,0 {
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power-source = <0>;
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};
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upd_hub_rst_state: upd-hub-rst-state {
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pins = "gpio4";
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function = "normal";
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bias-disable;
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input-disable;
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output-enable;
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output-high;
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power-source = <0>;
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};
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tc9563_resx_n: tc9563-resx-state {
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pins = "gpio1";
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function = "normal";
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};
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&pm7250b_gpios {
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upd_pwr_en1_state: upd-pwr-en1-state {
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pins = "gpio1";
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function = "normal";
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output-enable;
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input-disable;
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power-source = <0>;
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};
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lt9611_rst_pin: lt9611-rst-state {
18291973
pins = "gpio2";
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function = "normal";
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18331977
input-disable;
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power-source = <0>;
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};
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upd_pwr_en2_state: upd-pwr-en2-state {
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pins = "gpio4";
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function = "normal";
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output-enable;
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input-disable;
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power-source = <0>;
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};
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};
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&sdc2_clk {
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18782031
function = "gpio";
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bias-pull-up;
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};
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usb_hub_reset_state: usb-hub-reset-state {
2036+
pins = "gpio162";
2037+
function = "gpio";
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2039+
drive-strength = <2>;
2040+
bias-disable;
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};
18812042
};
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&lpass_audiocc {

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