QCLINUX: qcom-dcc: add logic to configure linked list in probe

Configure the linked list with defined register entries in dcc_probe.

Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com>

Author: jiegan0107

drivers/misc/qcom-dcc-dev.c

@@ -12,13 +12,50 @@
 
 static struct platform_device *dcc_pdev;
 
+static const struct dcc_register_entry talos_dcc_entries[] = {
+	{ "R 0x3d96000" },
+	{ "R 0x3d96004" },
+};
+
+static const struct dcc_link_config talos_link_configs[] = {
+	{
+		.link_list	= 3,
+		.entries	= talos_dcc_entries,
+		.num_entries	= ARRAY_SIZE(talos_dcc_entries),
+	},
+};
+
+static const struct dcc_config talos_config = {
+	.lists		= talos_link_configs,
+	.num_lists	= ARRAY_SIZE(talos_link_configs),
+};
+
 static const struct dcc_pdata talos_pdata = {
 	.base		= 0x010a2000,
 	.size		= 0x00001000,
 	.ram_base	= 0x010ae000,
 	.ram_size	= 0x00002000,
 	.dcc_offset	= 0x6000,
 	.map_ver	= 0x1,
+	.config		= &talos_config,
+};
+
+static const struct dcc_register_entry lemans_dcc_entries[] = {
+	{ "R 0x610110 1" },
+	{ "R 0x9050008 1" },
+};
+
+static const struct dcc_link_config lemans_link_configs[] = {
+	{
+		.link_list	= 6,
+		.entries	= lemans_dcc_entries,
+		.num_entries	= ARRAY_SIZE(lemans_dcc_entries),
+	},
+};
+
+static const struct dcc_config lemans_config = {
+	.lists		= lemans_link_configs,
+	.num_lists	= ARRAY_SIZE(lemans_link_configs),
 };
 
 static const struct dcc_pdata lemans_pdata = {
@@ -28,6 +65,7 @@ static const struct dcc_pdata lemans_pdata = {
 	.ram_size	= 0x00006000,
 	.dcc_offset	= 0x38800,
 	.map_ver	= 0x3,
+	.config		= &lemans_config,
 };
 
 static const struct dcc_pdata kodiak_pdata = {

drivers/misc/qcom-dcc.c

@@ -1425,6 +1425,72 @@ static ssize_t dcc_sram_read(struct file *file, char __user *data,
 	return len;
 }
 
+static void dcc_configure_list(struct dcc_drvdata *drvdata,
+			       const struct dcc_config *config)
+{
+	const struct dcc_link_config *link;
+	const struct dcc_register_entry *entry;
+	char *token, *bufp, *buf_orig;
+	char *delim = " ";
+	int ret, i, j, configured;
+	size_t len;
+
+	if (!config || !config->num_lists)
+		return;
+
+	for (i = 0; i < config->num_lists; i++) {
+		link = &config->lists[i];
+
+		if (link->link_list >= drvdata->max_link_list) {
+			dev_err(drvdata->dev, "Invalid link list index %d\n", link->link_list);
+			continue;
+		}
+
+		configured = 0;
+
+		for (j = 0; j < link->num_entries; j++) {
+			entry = &link->entries[j];
+
+			len = strlen(entry->config);
+			buf_orig = kzalloc(len + 1, GFP_KERNEL);
+			if (!buf_orig)
+				return;
+
+			strscpy(buf_orig, entry->config, len + 1);
+			bufp = buf_orig;
+
+			token = strsep(&bufp, delim);
+			if (!bufp) {
+				dev_err(drvdata->dev, "Malformed entry: \"%s\"\n",
+					entry->config);
+				kfree(buf_orig);
+				continue;
+			}
+
+			if (!strcmp("R", token)) {
+				ret = dcc_config_add_read(drvdata, bufp, link->link_list);
+			} else if (!strcmp("W", token)) {
+				ret = dcc_config_add_write(drvdata, bufp, link->link_list);
+			} else if (!strcmp("RW", token)) {
+				ret = dcc_config_add_read_write(drvdata, bufp, link->link_list);
+			} else if (!strcmp("L", token)) {
+				ret = dcc_config_add_loop(drvdata, bufp, link->link_list);
+			} else {
+				dev_err(drvdata->dev, "%s is not a correct input\n", token);
+				ret = -EINVAL;
+			}
+
+			if (ret >= 0)
+				configured++;
+
+			kfree(buf_orig);
+		}
+
+		if (configured)
+			dcc_enable(drvdata, link->link_list);
+	}
+}
+
 static const struct file_operations dcc_sram_fops = {
 	.owner		= THIS_MODULE,
 	.read		= dcc_sram_read,
@@ -1520,6 +1586,7 @@ static int dcc_probe(struct platform_device *pdev)
 	}
 
 	dcc_create_debug_dir(drvdata);
+	dcc_configure_list(drvdata, pdata->config);
 
 	return 0;
 }

drivers/misc/qcom-dcc.h

@@ -8,13 +8,29 @@
 
 #include <linux/platform_device.h>
 
+struct dcc_register_entry {
+	const char	*config;
+};
+
+struct dcc_link_config {
+	int					link_list;
+	const struct dcc_register_entry		*entries;
+	int					num_entries;
+};
+
+struct dcc_config {
+	const struct dcc_link_config	*lists;
+	int				num_lists;
+};
+
 struct dcc_pdata {
 	phys_addr_t	base;
 	resource_size_t	size;
 	phys_addr_t	ram_base;
 	resource_size_t	ram_size;
 	u32		dcc_offset;
 	u8		map_ver;
+	const struct dcc_config		*config;
 };
 
 #endif