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sgaud-quicsgaud-quic
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v4: Add explicit clock vote and enable power-domain for QCOM-ICE (#388)
v4: Add explicit clock vote and enable power-domain for QCOM-ICE
2 parents e9aec64 + d3326f5 commit 157fa2e

11 files changed

Lines changed: 52 additions & 34 deletions

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‎Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml‎

Lines changed: 26 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -28,10 +28,14 @@ properties:
2828
maxItems: 1
2929

3030
clocks:
31+
minItems: 1
3132
maxItems: 2
3233

3334
clock-names:
34-
maxItems: 2
35+
minItems: 1
36+
items:
37+
- const: core
38+
- const: iface
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3640
power-domains:
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maxItems: 1
@@ -40,11 +44,28 @@ required:
4044
- compatible
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- reg
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- clocks
43-
- clock-names
44-
- power-domains
4547

4648
additionalProperties: false
4749

50+
allOf:
51+
- if:
52+
properties:
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compatible:
54+
contains:
55+
enum:
56+
- qcom,eliza-inline-crypto-engine
57+
- qcom,milos-inline-crypto-engine
58+
59+
then:
60+
required:
61+
- power-domains
62+
- clock-names
63+
properties:
64+
clocks:
65+
minItems: 2
66+
clock-names:
67+
minItems: 2
68+
4869
examples:
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- |
5071
#include <dt-bindings/clock/qcom,sm8550-gcc.h>
@@ -55,8 +76,8 @@ examples:
5576
reg = <0x01d88000 0x8000>;
5677
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
5778
<&gcc GCC_UFS_PHY_AHB_CLK>;
58-
clock-names = "ice_core_clk",
59-
"iface_clk";
79+
clock-names = "core",
80+
"iface";
6081
power-domains = <&gcc UFS_PHY_GDSC>;
6182
};
6283
...

‎arch/arm64/boot/dts/qcom/kaanapali.dtsi‎

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -683,7 +683,11 @@
683683
"qcom,inline-crypto-engine";
684684
reg = <0x0 0x01d88000 0x0 0x18000>;
685685

686-
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
686+
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
687+
<&gcc GCC_UFS_PHY_AHB_CLK>;
688+
clock-names = "core",
689+
"iface";
690+
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
687691
};
688692

689693
tcsr_mutex: hwlock@1f40000 {

‎arch/arm64/boot/dts/qcom/lemans.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2824,8 +2824,8 @@
28242824
reg = <0x0 0x01d88000 0x0 0x18000>;
28252825
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
28262826
<&gcc GCC_UFS_PHY_AHB_CLK>;
2827-
clock-names = "ice_core_clk",
2828-
"iface_clk";
2827+
clock-names = "core",
2828+
"iface";
28292829
power-domains = <&gcc UFS_PHY_GDSC>;
28302830
};
28312831

‎arch/arm64/boot/dts/qcom/monaco.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2664,8 +2664,8 @@
26642664
reg = <0x0 0x01d88000 0x0 0x18000>;
26652665
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
26662666
<&gcc GCC_UFS_PHY_AHB_CLK>;
2667-
clock-names = "ice_core_clk",
2668-
"iface_clk";
2667+
clock-names = "core",
2668+
"iface";
26692669
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
26702670
};
26712671

‎arch/arm64/boot/dts/qcom/sc7180.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1601,8 +1601,8 @@
16011601
reg = <0 0x01d90000 0 0x8000>;
16021602
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
16031603
<&gcc GCC_UFS_PHY_AHB_CLK>;
1604-
clock-names = "ice_core_clk",
1605-
"iface_clk";
1604+
clock-names = "core",
1605+
"iface";
16061606
power-domains = <&gcc UFS_PHY_GDSC>;
16071607
};
16081608

‎arch/arm64/boot/dts/qcom/sc7280.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2590,8 +2590,8 @@
25902590
reg = <0 0x01d88000 0 0x18000>;
25912591
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
25922592
<&gcc GCC_UFS_PHY_AHB_CLK>;
2593-
clock-names = "ice_core_clk",
2594-
"iface_clk";
2593+
clock-names = "core",
2594+
"iface";
25952595
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
25962596
};
25972597

‎arch/arm64/boot/dts/qcom/sm8450.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5351,8 +5351,8 @@
53515351
reg = <0 0x01d88000 0 0x18000>;
53525352
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
53535353
<&gcc GCC_UFS_PHY_AHB_CLK>;
5354-
clock-names = "ice_core_clk",
5355-
"iface_clk";
5354+
clock-names = "core",
5355+
"iface";
53565356
power-domains = <&gcc UFS_PHY_GDSC>;
53575357
};
53585358

‎arch/arm64/boot/dts/qcom/sm8550.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2416,8 +2416,8 @@
24162416

24172417
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
24182418
<&gcc GCC_UFS_PHY_AHB_CLK>;
2419-
clock-names = "ice_core_clk",
2420-
"iface_clk";
2419+
clock-names = "core",
2420+
"iface";
24212421
power-domains = <&gcc UFS_PHY_GDSC>;
24222422
};
24232423

‎arch/arm64/boot/dts/qcom/sm8650.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4048,8 +4048,8 @@
40484048

40494049
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
40504050
<&gcc GCC_UFS_PHY_AHB_CLK>;
4051-
clock-names = "ice_core_clk",
4052-
"iface_clk";
4051+
clock-names = "core",
4052+
"iface";
40534053
power-domains = <&gcc UFS_PHY_GDSC>;
40544054
};
40554055

‎arch/arm64/boot/dts/qcom/sm8750.dtsi‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2069,8 +2069,8 @@
20692069

20702070
clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
20712071
<&gcc GCC_UFS_PHY_AHB_CLK>;
2072-
clock-names = "ice_core_clk",
2073-
"iface_clk";
2072+
clock-names = "core",
2073+
"iface";
20742074
power-domains = <&gcc GCC_UFS_PHY_GDSC>;
20752075
};
20762076

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