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2 parents 5dcc6b1 + 0dd71ca commit 0d32ebcCopy full SHA for 0d32ebc
3 files changed
arch/arm64/boot/dts/qcom/monaco-evk.dts
@@ -556,6 +556,7 @@
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&pcie0_phy {
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vdda-phy-supply = <&vreg_l6a>;
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vdda-pll-supply = <&vreg_l5a>;
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+ vdda-qref-supply = <&vreg_l4a>;
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status = "okay";
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};
@@ -575,6 +576,7 @@
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&pcie1_phy {
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arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -602,7 +602,8 @@
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- vdda-pll-supply = <&vreg_l4a>;
+ vdda-pll-supply = <&vreg_l5a>;
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@@ -622,6 +623,7 @@
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drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -3572,8 +3572,8 @@ static const struct qmp_phy_cfg qcs8300_qmp_gen4x2_pciephy_cfg = {
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.reset_list = sdm845_pciephy_reset_l,
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.num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
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- .vreg_list = qmp_phy_vreg_l,
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- .num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
+ .vreg_list = sm8550_qmp_phy_vreg_l,
+ .num_vregs = ARRAY_SIZE(sm8550_qmp_phy_vreg_l),
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.regs = pciephy_v5_regs_layout,
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.pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
@@ -4323,8 +4323,8 @@ static const struct qmp_phy_cfg sa8775p_qmp_gen4x4_pciephy_cfg = {
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