PENDING: arm64: dts: qcom: lemans-evk: add overlay for QPS615 ethernet

Add an overlay devicetree for Lemans EVK for temporary enablement of the
QPS615 PCIE switch's 10GbE and 2.5Gbe ethernet ports.

Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com>

Author: ayaan-anwar

arch/arm64/boot/dts/qcom/Makefile

@@ -419,6 +419,8 @@ lemans-camx-el2-dtbs	:= lemans-evk-el2.dtb lemans-evk-camx.dtbo lemans-camx-el2.
 
 dtb-$(CONFIG_ARCH_QCOM)	+= lemans-camx-el2.dtb
 
+dtb-$(CONFIG_ARCH_QCOM)	+= lemans-evk-staging.dtbo
+
 monaco-evk-camx-dtbs   := monaco-evk.dtb monaco-evk-camx.dtbo
 
 dtb-$(CONFIG_ARCH_QCOM) += monaco-evk-camx.dtb

arch/arm64/boot/dts/qcom/lemans-evk-staging.dtso

@@ -0,0 +1,68 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.
+ */
+
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+&i2c18 {
+	eeprom@52 {
+		nvmem-layout {
+			mac_addr2: mac-addr@6 {
+				reg = <0x6 0x6>;
+			};
+			mac_addr3: mac-addr@c {
+				reg = <0xc 0x6>;
+			};
+		};
+	};
+};
+
+&pcieport0 {
+	pcie@0,0 {
+		pcie@3,0 {
+			pci@0,0 {
+				interrupts-extended = <&tlmm 56 IRQ_TYPE_EDGE_FALLING>;
+				interrupt-names = "wol_irq";
+				nvmem-cells = <&mac_addr2>;
+				nvmem-cell-names = "mac-address";
+				pinctrl-names = "default";
+				pinctrl-0 = <&aqr_intn_wol_sig>;
+				phy-reset-gpios = <&tlmm 76 GPIO_ACTIVE_HIGH>;
+				reset-deassert-us = <221000>;
+			};
+
+			pci@0,1 {
+				interrupts-extended = <&tlmm 57 IRQ_TYPE_EDGE_FALLING>;
+				interrupt-names = "wol_irq";
+				nvmem-cells = <&mac_addr3>;
+				nvmem-cell-names = "mac-address";
+				pinctrl-names = "default";
+				pinctrl-0 = <&napa_intn_wol_sig>;
+				phy-reset-gpios = <&tlmm 77 GPIO_ACTIVE_HIGH>;
+				reset-deassert-us = <20000>;
+			};
+		};
+	};
+};
+
+&tlmm {
+	qps615_intn_wol {
+		aqr_intn_wol_sig: aqr-intn-wol-sig {
+			pins = "gpio56";
+			function = "gpio";
+			input-enable;
+			bias-disable;
+		};
+		napa_intn_wol_sig: napa-intn-wol-sig {
+			pins = "gpio57";
+			function = "gpio";
+			input-enable;
+			bias-disable;
+		};
+	};
+};