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Espressif: Add ESP-IDF component generator and wake word op profiles
build_idf_component.sh generates a self-contained, source-vendored ESP-IDF component from this repository, modeled on the Arduino packaging script: - Schema headers generated with a host flatc (built from third-party/flatbuffers when unavailable); consumers need only ESP-IDF. - Per-profile kernel registration via ExecuTorch selective-build codegen. Profiles may mix aten:: ops (portable kernels) with cadence:: ops (Cadence backend generic/portable kernels, via backends/cadence/aot/functions.yaml with the selection filtered to the profile's roots). Each profile gets its own generated registration; Kconfig selects one without regeneration. - Core runtime and kernel sources vendored from the same build_variables.bzl lists the CMake build uses. - VERSION records the ExecuTorch commit and per-profile op-set SHA-256 + kernel counts, so model exports can be checked against the vendored component. Profile: wakeword_int8 (Hey Muse StreamingWakeWord, Cadence-backend int8 export). README documents the generated-component flow next to the existing executor runner.
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‎examples/espressif/README.md‎

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@@ -8,6 +8,38 @@ ESP32-S3 microcontrollers. It is based on the
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[Arm Cortex-M executor runner](../arm/executor_runner/) and adapted for the
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ESP-IDF build system and ESP32 memory architecture.
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## ESP-IDF component (generated, source-vendored)
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For integrating ExecuTorch into an existing ESP-IDF project without the
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cross-compile-then-link flow below, generate a self-contained ESP-IDF
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component from sources in this repository:
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```bash
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./examples/espressif/build_idf_component.sh --profiles wakeword_int8 \
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--out /path/to/your_project/components/executorch
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```
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The output is a registry-shaped component (`idf_component.yml`,
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`CMakeLists.txt`, `Kconfig`, `VERSION`) containing the runtime,
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per-profile kernel registration (selected via
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`CONFIG_ET_OP_PROFILE_*`), the shared ESP-IDF PAL from
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`platform/esp_pal.cpp` (ESP_LOG + `esp_timer` timing), and a C
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inference API (`et_model.h`, flash-XIP model bytes
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with internal/PSRAM arena placement). Application pipelines built on
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the runtime (for example wake word front ends and detectors) stay
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with the application. Op profiles are defined in
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`idf_profiles/<name>.ops`; `wakeword_int8` is an int8 wake-word
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example profile for a Cadence-backend export — profiles may list
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`cadence::` ops, which the generator binds to the Cadence backend's
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generic (portable) kernels under `backends/cadence/generic`, next to
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the `aten::` ops the same profile needs from the portable kernels.
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Consumers need only ESP-IDF — no host CMake build, no flatc. To
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smoke-test a generation, build a consumer project for one Xtensa and
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one RISC-V target (for example esp32s3 and esp32c5).
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The executor runner below remains the reference for the prebuilt-library
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flow and for benchmarking.
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## Supported Targets
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| Chip | CPU | Internal SRAM | PSRAM (optional) |

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