@@ -33,6 +33,10 @@ SequentialBlockFile::SequentialBlockFile (int nChannels, int samplesPerBlock) :
3333 m_memBlocks.ensureStorageAllocated (blockArrayInitSize);
3434 for (int i = 0 ; i < nChannels; i++)
3535 m_currentBlock.add (-1 );
36+
37+ // Pre-allocate batch buffers and cache tile config to avoid hot-path allocations
38+ m_batchChannelPtrs.reserve (nChannels);
39+ m_tileConfig = SIMDConverter::getRecommendedTileConfig (nChannels);
3640}
3741
3842SequentialBlockFile::~SequentialBlockFile ()
@@ -141,7 +145,6 @@ bool SequentialBlockFile::writeChannelBatch (uint64 startPos, int16* const* chan
141145 // Batch writing requires all channels - return false to signal caller should use per-channel writes
142146 if (numChannels != m_nChannels)
143147 {
144- printf (" [RN]SequentialBlockFile::writeChannelBatch channel count mismatch: expected %d, got %d\n " , m_nChannels, numChannels);
145148 return false ;
146149 }
147150
@@ -164,32 +167,33 @@ bool SequentialBlockFile::writeChannelBatch (uint64 startPos, int16* const* chan
164167 int dataIdx = 0 ;
165168 int lastBlockIdx = m_memBlocks.size () - 1 ;
166169
167- // Get recommended tile configuration for cache-efficient interleaving
168- auto tileConfig = SIMDConverter::getRecommendedTileConfig (m_nChannels);
169-
170170 while (writtenSamples < nSamples)
171171 {
172172 int16* blockPtr = m_memBlocks[bIndex]->getData ();
173173 int samplesToWrite = jmin ((nSamples - writtenSamples), (m_samplesPerBlock - int (startIdx)));
174174
175- // Create adjusted channel data pointers for the current data offset
176- std::vector<const int16_t *> adjustedChannelPtrs (m_nChannels);
175+ // Use pre-allocated channel pointer array to avoid allocation in hot path
176+ // Resize only if needed (should rarely happen after first call)
177+ if (m_batchChannelPtrs.size () != static_cast <size_t > (m_nChannels))
178+ m_batchChannelPtrs.resize (m_nChannels);
179+
177180 for (int ch = 0 ; ch < m_nChannels; ch++)
178181 {
179- adjustedChannelPtrs [ch] = channelData[ch] + dataIdx;
182+ m_batchChannelPtrs [ch] = channelData[ch] + dataIdx;
180183 }
181184
182185 // Calculate output position in the block
183186 int16_t * outputPtr = blockPtr + startIdx * m_nChannels;
184187
185188 // Use SIMD-optimized interleaving with cache-blocked tiles
189+ // Use cached tile config to avoid repeated lookups
186190 SIMDConverter::interleaveInt16 (
187- adjustedChannelPtrs .data (),
191+ m_batchChannelPtrs .data (),
188192 outputPtr,
189193 m_nChannels,
190194 samplesToWrite,
191- tileConfig .tileSamples ,
192- tileConfig .tileChannels );
195+ m_tileConfig .tileSamples ,
196+ m_tileConfig .tileChannels );
193197
194198 writtenSamples += samplesToWrite;
195199 dataIdx += samplesToWrite;
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