@@ -166,6 +166,19 @@ static int sdhci_at91_set_clks_presets(struct device *dev)
166166 clk_prepare_enable (priv -> hclock );
167167 caps0 = readl (host -> ioaddr + SDHCI_CAPABILITIES );
168168 caps1 = readl (host -> ioaddr + SDHCI_CAPABILITIES_1 );
169+
170+ /*
171+ * We experience some issues with SDR104. If the SD clock is higher
172+ * than 100 MHz, we can get data corruption. With a 100 MHz clock,
173+ * the tuning procedure may fail. For those reasons, it is useless to
174+ * advertise that we can use SDR104 mode, so remove it from
175+ * the capabilities.
176+ */
177+ writel (SDMMC_CACR_KEY | SDMMC_CACR_CAPWREN , host -> ioaddr + SDMMC_CACR );
178+ caps1 &= (~SDHCI_SUPPORT_SDR104 );
179+ writel (caps1 , host -> ioaddr + SDHCI_CAPABILITIES_1 );
180+ writel (0 , host -> ioaddr + SDMMC_CACR );
181+
169182 clk_base = (caps0 & SDHCI_CLOCK_V3_BASE_MASK ) >> SDHCI_CLOCK_BASE_SHIFT ;
170183 clk_mul = (caps1 & SDHCI_CLOCK_MUL_MASK ) >> SDHCI_CLOCK_MUL_SHIFT ;
171184 gck_rate = clk_base * 1000000 * (clk_mul + 1 );
@@ -402,6 +415,8 @@ static int sdhci_at91_probe(struct platform_device *pdev)
402415 if (host -> mmc -> caps & MMC_CAP_NONREMOVABLE )
403416 sdhci_at91_set_force_card_detect (host );
404417
418+ device_init_wakeup (& pdev -> dev , true);
419+
405420 pm_runtime_put_autosuspend (& pdev -> dev );
406421
407422 return 0 ;
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