|
| 1 | +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/sound/microchip,asrc.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Asynchronous Sample Rate Converter |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Codrin Ciubotariu <codrin.ciubotariu@microchip.com> |
| 11 | + |
| 12 | +description: |
| 13 | + The Asynchronous Sample Rate Converter (ASRC) converts the sample rate of an |
| 14 | + incoming audio frame without affecting quality. It supports input and output |
| 15 | + sampling rates up to 192 kHz. It is made of 4 independent digital signal |
| 16 | + processing modules (DSP) |
| 17 | + |
| 18 | +properties: |
| 19 | + compatible: |
| 20 | + const: microchip,sama7g5-asrc |
| 21 | + |
| 22 | + reg: |
| 23 | + maxItems: 1 |
| 24 | + |
| 25 | + "#sound-dai-cells": |
| 26 | + const: 1 |
| 27 | + |
| 28 | + interrupts: |
| 29 | + maxItems: 1 |
| 30 | + |
| 31 | + clocks: |
| 32 | + items: |
| 33 | + - description: Peripheral Bus Clock |
| 34 | + - description: Generic Clock |
| 35 | + |
| 36 | + clock-names: |
| 37 | + items: |
| 38 | + - const: pclk |
| 39 | + - const: gclk |
| 40 | + |
| 41 | + dmas: |
| 42 | + description: RX and TX DMA Channels |
| 43 | + minItems: 8 |
| 44 | + maxItems: 8 |
| 45 | + |
| 46 | + dma-names: |
| 47 | + items: |
| 48 | + - const: rx0 |
| 49 | + - const: tx0 |
| 50 | + - const: rx1 |
| 51 | + - const: tx1 |
| 52 | + - const: rx2 |
| 53 | + - const: tx2 |
| 54 | + - const: rx3 |
| 55 | + - const: tx3 |
| 56 | + |
| 57 | + microchip,triggers: |
| 58 | + $ref: /schemas/types.yaml#/definitions/phandle-array |
| 59 | + minItems: 1 |
| 60 | + maxItems: 16 |
| 61 | + description: | |
| 62 | + List of phandles pointing to other audio peripherals that can generate |
| 63 | + a trigger to ASRC. The trigger is used by the ASRC to compute the needed |
| 64 | + sampling rate. |
| 65 | +
|
| 66 | + microchip,trigger-indexes: |
| 67 | + $ref: /schemas/types.yaml#/definitions/uint32-array |
| 68 | + minItems: 1 |
| 69 | + maxItems: 16 |
| 70 | + description: | |
| 71 | + An array of external (to ASRC) trigger indexes. Position of an entry |
| 72 | + determines to which trigger phandle (from the 'trigger' property) the |
| 73 | + value reffers to. e.g. the first value in 'trigger-indexes' will |
| 74 | + correspond to the first phande in 'triggers', the second value from |
| 75 | + 'trigger-indexes' will correspond to the second phandle in 'triggers', |
| 76 | + etc. |
| 77 | +
|
| 78 | +required: |
| 79 | + - compatible |
| 80 | + - reg |
| 81 | + - "#sound-dai-cells" |
| 82 | + - interrupts |
| 83 | + - clocks |
| 84 | + - clock-names |
| 85 | + - dmas |
| 86 | + - dma-names |
| 87 | + - microchip,triggers |
| 88 | + - microchip,trigger-indexes |
| 89 | + |
| 90 | +additionalProperties: false |
| 91 | + |
| 92 | +examples: |
| 93 | + - | |
| 94 | + #include <dt-bindings/clock/at91.h> |
| 95 | + #include <dt-bindings/dma/at91.h> |
| 96 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 97 | +
|
| 98 | + asrc: sound@e1610000 { |
| 99 | + compatible = "microchip,sama7g5-asrc"; |
| 100 | + reg = <0xe1610000 0x1000>; |
| 101 | + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
| 102 | + #sound-dai-cells = <1>; |
| 103 | + dmas = <&dma0 AT91_XDMAC_DT_PERID(55)>, |
| 104 | + <&dma0 AT91_XDMAC_DT_PERID(56)>, |
| 105 | + <&dma0 AT91_XDMAC_DT_PERID(57)>, |
| 106 | + <&dma0 AT91_XDMAC_DT_PERID(58)>, |
| 107 | + <&dma0 AT91_XDMAC_DT_PERID(59)>, |
| 108 | + <&dma0 AT91_XDMAC_DT_PERID(60)>, |
| 109 | + <&dma0 AT91_XDMAC_DT_PERID(61)>, |
| 110 | + <&dma0 AT91_XDMAC_DT_PERID(62)>; |
| 111 | + dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2", "rx3", "tx3"; |
| 112 | + clocks = <&pmc PMC_TYPE_PERIPHERAL 30>, <&pmc PMC_TYPE_GCK 30>; |
| 113 | + clock-names = "pclk", "gclk"; |
| 114 | + microchip,triggers = <&i2s0>, <&i2s1>, <&pdmc0>, <&pdmc1>, <&ssc0>, |
| 115 | + <&ssc1>, <&spdiftx>, <&spdifrx>; |
| 116 | + microchip,trigger-indexes = <1>, <2>, <3>, <4>, <5>, <8>, <9>, <10>; |
| 117 | + }; |
0 commit comments