@@ -361,6 +361,8 @@ static int atmel_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
361361}
362362
363363static struct gpio_chip atmel_gpio_chip = {
364+ .request = gpiochip_generic_request ,
365+ .free = gpiochip_generic_free ,
364366 .direction_input = atmel_gpio_direction_input ,
365367 .get = atmel_gpio_get ,
366368 .direction_output = atmel_gpio_direction_output ,
@@ -647,11 +649,27 @@ static int atmel_pmx_set_mux(struct pinctrl_dev *pctldev,
647649 return 0 ;
648650}
649651
652+ static int atmel_pmx_gpio_request_enable (struct pinctrl_dev * pctldev ,
653+ struct pinctrl_gpio_range * range ,
654+ unsigned offset )
655+ {
656+ u32 conf ;
657+
658+ conf = atmel_pin_config_read (pctldev , offset );
659+ conf &= (~ATMEL_PIO_CFGR_FUNC_MASK );
660+ atmel_pin_config_write (pctldev , offset , conf );
661+
662+ dev_dbg (pctldev -> dev , "enable pin %u as GPIO\n" , offset );
663+
664+ return 0 ;
665+ }
666+
650667static const struct pinmux_ops atmel_pmxops = {
651668 .get_functions_count = atmel_pmx_get_functions_count ,
652669 .get_function_name = atmel_pmx_get_function_name ,
653670 .get_function_groups = atmel_pmx_get_function_groups ,
654671 .set_mux = atmel_pmx_set_mux ,
672+ .gpio_request_enable = atmel_pmx_gpio_request_enable ,
655673};
656674
657675static int atmel_conf_pin_config_group_get (struct pinctrl_dev * pctldev ,
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