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riscv: dts: microchip: update peripherals in icicle kit device tree
Assorted minor changes to the MPFS/Icicle kit device tree: - enable mmuart4 instead of mmuart0 - remove sifive pdma - split memory node to match updated fpga design - move stdout path to serial1 to avoid collision with bootloader running on the e51 Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
1 parent 627d3ca commit c25cf80

2 files changed

Lines changed: 29 additions & 17 deletions

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arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts

Lines changed: 16 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -20,20 +20,29 @@
2020
serial1 = &mmuart1;
2121
serial2 = &mmuart2;
2222
serial3 = &mmuart3;
23+
serial4 = &mmuart4;
2324
};
2425

2526
chosen {
26-
stdout-path = "serial0:115200n8";
27+
stdout-path = "serial1:115200n8";
2728
};
2829

2930
cpus {
3031
timebase-frequency = <RTCCLK_FREQ>;
3132
};
3233

33-
memory@80000000 {
34+
ddrc_cache_lo: memory@80000000 {
3435
device_type = "memory";
35-
reg = <0x0 0x80000000 0x0 0x40000000>;
36+
reg = <0x0 0x80000000 0x0 0x2e000000>;
3637
clocks = <&clkcfg CLK_DDRC>;
38+
status = "okay";
39+
};
40+
41+
ddrc_cache_hi: memory@1000000000 {
42+
device_type = "memory";
43+
reg = <0x10 0x0 0x0 0x40000000>;
44+
clocks = <&clkcfg CLK_DDRC>;
45+
status = "okay";
3746
};
3847

3948
soc {
@@ -44,10 +53,6 @@
4453
clock-frequency = <600000000>;
4554
};
4655

47-
&mmuart0 {
48-
status = "okay";
49-
};
50-
5156
&mmuart1 {
5257
status = "okay";
5358
};
@@ -60,6 +65,10 @@
6065
status = "okay";
6166
};
6267

68+
&mmuart4 {
69+
status = "okay";
70+
};
71+
6372
&mmc {
6473
status = "okay";
6574

arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi

Lines changed: 13 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -174,15 +174,6 @@
174174
<&cpu4_intc 3>, <&cpu4_intc 7>;
175175
};
176176

177-
dma@3000000 {
178-
compatible = "sifive,fu540-c000-pdma";
179-
reg = <0x0 0x3000000 0x0 0x8000>;
180-
interrupt-parent = <&plic>;
181-
interrupts = <23>, <24>, <25>, <26>, <27>, <28>, <29>,
182-
<30>;
183-
#dma-cells = <1>;
184-
};
185-
186177
plic: interrupt-controller@c000000 {
187178
#interrupt-cells = <1>;
188179
compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
@@ -212,7 +203,7 @@
212203
interrupts = <90>;
213204
current-speed = <115200>;
214205
clocks = <&clkcfg CLK_MMUART0>;
215-
status = "disabled";
206+
status = "disabled"; /* Reserved for the HSS */
216207
};
217208

218209
mmuart1: serial@20100000 {
@@ -251,6 +242,18 @@
251242
status = "disabled";
252243
};
253244

245+
mmuart4: serial@20106000 {
246+
compatible = "ns16550a";
247+
reg = <0x0 0x20106000 0x0 0x400>;
248+
reg-io-width = <4>;
249+
reg-shift = <2>;
250+
interrupt-parent = <&plic>;
251+
interrupts = <94>;
252+
clocks = <&clkcfg CLK_MMUART4>;
253+
current-speed = <115200>;
254+
status = "disabled";
255+
};
256+
254257
/* Common node entry for emmc/sd */
255258
mmc: mmc@20008000 {
256259
compatible = "microchip,mpfs-sd4hc", "cdns,sd4hc";

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