spi: atmel-quadspi: fix possible MMIO window size overrun

The QSPI controller memory space is limited to 128MB:
0x9000_00000-0x9800_00000/0XD000_0000--0XD800_0000.

There are nor flashes that are bigger in size than the memory size
supported by the controller: Micron MT25QL02G (256 MB).

Check if the address exceeds the MMIO window size. An improvement
would be to add support for regular SPI mode and fall back to it
when the flash memories overrun the controller's memory space.

Fixes: 0e6aae0 ("spi: Add QuadSPI driver for Atmel SAMA5D2")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
[claudiu.beznea@microchip.com: adapt it to current code base]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>

Author: cristibirsan

drivers/spi/atmel-quadspi.c

@@ -154,6 +154,7 @@ struct atmel_qspi {
 	void __iomem		*mem;
 	struct clk		*clk;
 	struct platform_device	*pdev;
+	resource_size_t		mmap_size;
 	u32			pending;
 	u32			scr;
 	struct completion	cmd_completion;
@@ -235,6 +236,14 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
 	u32 iar, icr, ifr, sr;
 	int err = 0;
 
+	/*
+	 * Check if the address exceeds the MMIO window size. An improvement
+	 * would be to add support for regular SPI mode and fall back to it
+	 * when the flash memories overrun the controller's memory space.
+	 */
+	if (op->addr.val + op->data.nbytes > aq->mmap_size)
+		return -EADDRNOTAVAIL;
+
 	iar = 0;
 	icr = QSPI_ICR_INST(op->cmd.opcode);
 	ifr = QSPI_IFR_INSTEN;
@@ -446,6 +455,7 @@ static int atmel_qspi_probe(struct platform_device *pdev)
 		err = PTR_ERR(aq->mem);
 		goto exit;
 	}
+	aq->mmap_size = resource_size(res);
 
 	/* Get the peripheral clock */
 	aq->clk = devm_clk_get(&pdev->dev, NULL);